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Windows 11, fully up to date. A screenshot is attached.

This is wierd. You're running on Windows 10 or 11 or some other version? Or are you running on linux? Can you do a screen shot maybe of your errors?

I'm using KiCad 8.0.3. I can't even save to C:\ temp by answering 'NO' and selecting the folder C:\temp. -- This email has been checked for viruses by AVG antivirus software. www.avg.com

What version of Kicad are you using? And what about just saving to C:\temp and then moving it over to the project folder?

I am trying to save the BOM as a .CSV file into the folder with the other KiCad files, but it doesn't save. Wherever I try to save it to, I get a message box that says 'Do you want to use a path

In the case of the 200p + 18p, it would be hard to avoid COG/NP0 ceramic anyway, so the temperature effects are probably not much of a consideration. I'm not saying there is no advantage in making

It's completely true, but, as you say, it's not the whole, very exhausting, story. I am commenting at the very basic level of 'What about tolerance?' Your input is at a second level of concern. I

What you're saying about tolerance is only half-true. Paralleling multiple capacitances doesn't change the worst cases. But it does change the standard deviation. Assuming 4 equal valued capacitors in

It's not clear what you are doing about component tolerances. You can get 218 pF with a 150 pF and a 68 pF in parallel. That is just within +1% of 216 pF. A single 220 pF is within +2%. If all your

Hi all, Many thanks for your efforts to fix my dilemma. I've come up with a work-around that is reasonable painless and makes it easy for the next project builder to see what I've done. So

To achieve what you want, I just use 4 footprints. No problem for BOM. But in PCB, I just hide all the value text. Then add a field at one of them says "4x100nF". Just like that.? You can also add a

When I need to stack surface-mount components I use a bit of "blue painters tape" on my bench with the sticky side up. I place a few large washers or similar on the ends of the tape to keep it from

The easiest way is to manually enter that into the bom and put instructions in the assembly drawing. It will probably cause pick and place issue (and it would not show up correctly as well), so it

TLDR; Skip to last paragraph. If soldering all four capacitors in a neat little stack is OK for your public to perform, then I'd make a library component without pads. Then you could place one

Thanks for the reply Erik, The footprint is currently assigned to every group, and yes, the location of each member of the group is totally arbitrary.? The main center pad(1) is the active pad with

... If the depicted 4x1206 assembly is in your library as a single component, then I'd just set its value to: 100pF + 47pF + 47pF + 22pF and add a line of e.g. awk to split that up into 4

Hi all I'm drawing up a Low Pass Filter for a HF power amp. The topology of the filter requires some parallel capacitors to achieve the required capacitances. In most cases 4 capacitors (sometimes 6)

Ouuu, Little bit hidden settings. But, it works now. Thank You! Regards Peter ?t 10. 10. 2024 o 9:48 Tony Casey via groups.io <tony@...> napísal(a):

Hi Tony, Thank you very much! Everything is Ok. Best regards, Varuzhan

Like this: -- Regards, Tony