Re: Qrp-labs and a Huff and Puff circuit board
Thanks Arv
Yeah it is a very curious thing.? I am injecting a TTL level signal from a DDS for testing so the input level is not a factor.? What gives me doubts about continuing with this design is what is going on when there is not an obvious response action on the control output.? When the action is obvious it makes sense ie as I vary the input frequency up/dn the control output duty cycle varies from 100% to 0% and the integrated output creates a DC swing virtually rail to rail but there are also spots where the integrated output shows only a small swing around vcc/2.? Now on the scope as I vary the input up/dn I see there is definitely a point at a certain frequency where the variation in duty cycle slows and the integrated signal transitions from a sine wave to DC but the amplitude of the swing is small and therefore would have a much less powerful affect on the varactor.? Is that considered a lock point?? If you look at the digital output before the integrator you only see a square wave, the variations in the duty cycle are so small you don't notice them on the scope but you see the effect once integrated.? How this would play if I closed the loop around an actual VFO instead of testing the way I am isn't intuitively obvious.? I am tempted to put this one aside and try the one with the frequency counter which I suspect may require less black arts skills!
Joe
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Joe
I have to admit that when Hans first brought H&P to my attention several years ago it took
me several months before I was forced to admit that it was not a mixer.? Key concept? is edge
alignment between the two signals (VFO and reference clock).? Once I had set aside my
own attempt to do an Arduino version and built a simple D-type FF based version, things
began to make more sense to my feeble brain.?
My first working H&P used a 32 Hz reference from a divider on a 32 KHz crystal oscillator, with a 74HC74 as comparator and things started to work better.? From there it was just a matter
of fine tuning levels to make it actually control the VFO side of things.? Note, there is no
"lock" state in H&P.? It always slowly wanders up and down about 1 Hz around multiples
of the reference clock.? Time delay in the control loop and coupling between the varactor
and oscillator tank make its action more aggressive or less aggressive.? If too aggressive the?
frequency control will feel "sticky".? Inadequately aggressive circuits may jump tuning steps
if the VFO drift rate exceeds frequency correction rate.?
My second working version had way too much control of the VFO and refused to tune in
desired steps.? It would hold a set frequency until I had tuned the VFO several steps away
from the 32 Hz reference and then jump several steps to the nearest 32 Hz based reference
point.? After I added a series resistor in the feedback loop this build settled down and is still
being used to stabilize an old BITX40A.?
There are several ways to implement H&P.? My versions used a D-type FF to latch HIGH or LOW based on edge comparison between the LF reference and the VFO.? Just to prove a point I did
build one that reversed the HF and LF parts by dividing the VFO down to LF and comparing that
with a HF reference clock.? That works maybe better for my friends in Australia and New Zealand
where things are normally upside down.?? 8-)
Other versions of H&P are set up to always push or pull the frequency in one direction, with drift
compensation adjusted to always drift in the opposite direction.? That just confused me so I
mostly avoided this idea.
It should be possible to use some sort of discrete component multi-vibrator circuit to replace
the comparison latch.? This might be a valid approach for tube-type VFOs where the voltages
are higher than nominally 5V TTL levels.? I did model this in LTSpice but never actually built one.?
H&P is sensitive to signal levels because this affects the point where the latch (D-type FF)
senses leading or lagging conditions and toggles its output accordingly.? Adding a Schmidt-trigger
CMOS gate(s) ahead of the latch? inputs could minimize this and might reduce any jitter output
from the phase comparison action.
All of the several H&P circuits that I have built required some fine-tuning before they would
work properly.? This adds credibility to Hans` statement about H&P probably not being
something that could be offered as a kit that others could just plug into existing circuits and
expect it to work first try.?
I did go back to an Arduino based FLL (not H&P) design that counts VFO frequency and
compares that with a user-entered frequency value.? This is an easier thing to get working and it does have 3-states (too high, locked, and too low).? This does not have set tuning steps unless you design that into the software side of things.? Tuning rate can be made variable
based on how far off-frequency the measured VFO might be.? Some may disagree but this
seems closer to an FLL than a traditional H&P design.?
There are micro-controller based stabilizers that claim to be H&P but I have never seriously
tried to use or duplicate them.?
Don't know if any of this is helpful.? H&P is an interesting concept, and one that can be
implemented successfully if time is taken to fully understand how it works and to fine-tune the circuitry.
Arv _._
Well last night I had a bit of a play around with the software type shift register and XOR implementation using a Sparkfun UBW board which has a PIC18 processor and a 24MHz crystal.? G3DXZ originally ran this on a PIC16 architecture with a much lower frequency crystal to get a 5Hz lock step, but I used an internal prescaler to get a very close RF sample rate of 2929.6 Hz and a shift register size of 296 bits (37 bytes) so this, according to the lore, should result in a lock step size of 2929.6 / 296 = 9.89 Hz which is as close as I could get to 10hz with this particular crystal and approach.? If I modified the code I could reduce the shift reg to 293 bits and get 9.998Hz but it is written to use a shift register which is a full multiple of 8 bits so I stuck with that and went ahead and did some testing.? Ironically today I can feed a test signal from a DDS source with high stability and adjust the frequency in 0.01Hz steps and observe the control output with the system open loop.? I used an integrator of 390Kohm feeding a 1uF on the output.? What I saw on the scope was fascinating but unfortunately I'm still a little perplexed about how this technique works!? What I observed was that the integrated output produces a heterodyne, the frequency of which is highly responsive to the exact frequency at the input and increases in amplitude as the heterodyne approaches 0 Hz.? However, I expected this behaviour to be cyclical and repeat at intervals of 9.9hz, which it did not.? It is difficult to find these lock points as they are extremely sensitive to very small changes in frequency at the input and the amplitude of the observed heterodyne diminishes rapidly as its frequency departs from DC either side and this happens within a few 0.01hz steps change of input frequency up or down from the DC output point!? So scanning the input frequency in 1 hz steps, you easily miss a strong response on the control output. At first I didn't think it was working at all and that there was a mistake in porting the code to the new architecture, but then I realized I needed to vary the input frequency much more slowly than I was.? This was fascinating and I played around for a few hours. In fact I could observe the slow drift of the DDS (sub 0.01Hz over several minutes) either that or the PIC clock crystal drifting, or both I guess. I tried various combinations of sample rate and shift register length but I was not able to observe a definite action at regular intervals of input frequency.? Also I noticed that the strength of the response (I mean amplitude of the heterodyne) varied a lot with the input frequency.? Some points had a very strong response for example I could sometimes get a swing of 4vp-p but at other input frequencies the heterodyne would only swing 70mV p-p near 0hz. Away from the frequency which produced a low frequency heterodyne, the integrator output tends to settle around 1/2vcc average with a small ac riding ther as the digital output is close to 50% duty cycle but obviously varies a little but you can't see it by looking at the digital XOR out directly.? I'm still scratching my head.? The output of the XOR has a very complex behavioir and I wish someone (Arv?) could help me understand it.? What I expected was that the duty cycle would vary between near zero and near 100% and be near 50% every 10hz but this clearly is not how it works. It doesn't appear that there is? strong action on the VFO other than at specific frequencies.? Once one of these critical frequencies is hit, I could see the system having a strong affect on the VFO to lock it but it doesn't look like there is much to drive it toward lock if it happens to be outside a small frequency range of a few hundredths of a hertz.? At this point I've spent enough time on this particular approach but I chose it first because it is so simple (physically at least) and I thought I could get something going with the least time and effort, which didn't turn out to be the case.? I guess I'll think about gearing up for the second H&P technique which uses a frequency counter and is more of a brute force approach.? I really wanted this shift register idea to work though as it seems elegant and deceptively simple, but obviously I have missed something critical. If anybody has a hint for me I'm all ears.
Joe ve3vxo
On Wed, Apr 10, 2019 at 10:47 AM Joe Street via Groups.Io <racingtheclouds= [email protected]> wrote: Hand = Hans in my last post.? Sorry Hans.
On Wed, Apr 10, 2019 at 10:45 AM Joe Street via Groups.Io <racingtheclouds= [email protected]> wrote: Thank you Hand for preserving a very cool bit of history so comprehensively on your website.? Chaz Fletcher G3DXZ also had a minimalist 1 chip stabilizer I thought was very clever and looks pretty easy to use although I haven't finished testing this yet.? It used a PIC processor and a software shift register and the XOR was done by using the bitwise XOR instruction as well.? The processor clock was the reference and it was divided down using a hardware timer overflow as an interrupt source which produced a sample rate of 2400hz and a lock step size of 5 hz.? Strangely the XOR instruction phase detector didn't work when the code was ported from PIC1684 to PIC16628 due to a change in the way the newer chip handles the carry bit and a work around was made using a few bit test instructions . I have ported this very simple code to PIC18 architecture as well if anybody wants it, let me know.
Joe ve3vxo
Hi all
Huff & Puff was a passion of mine. I was licensed in 1994, but for various personal reasons did not go on air. I did keep reading RadCom (monthly journal of the RSGB) and was fascinated by the Huff Puff articles which appeared in Pat G3VA (SK)'s monthly "Tech Topics" column. I collected everything I could find about Huff Puff and started making my Huff Puff library, eventually putting it online on my website that I created, initially just for this purpose, in 1999. So... everything grew from these roots!
In late 2001 David WN5Y emailed me and we started discussing Huff & Puff, he was using it in his "Electroluminescent Receiver" which he still to this day sells as a kit see??- and I actually finally purchased one of his kits a year ago but still have not finished building it! Anyway - as a result of that correspondence, I decided to also build my first Huff Puff circuit. It was also the first time I had built ANYTHING at all for 8 years. I wanted to try the magnetic field method of varying inductor core permeability that David used. The result was my stabilizer??and I built a 14MHz VFO that was stabilized by this circuit.?
That then became, with a mixture of other circuits also from Pat G3VA (RIP)'s column - such as the Tayloe detector (Quadrature Sampling Detector) and Polyphase networks - my first amateur radio receiver which you can read about here: .? Then I built my 1-valve (tube) CW transmitter which was also from G3VA's column.? My ATU was built around 1984 and was also a RadCom project at some point see ?
That was the station, in March 2002, that I used for my first ever QSO see??
So. This Huff Puff stuff is a very important part of my personal radio history. Later, the website was expanded to include lots of old projects, and I started adding new ones... so really 2002 was the birth of my amateur radio life.?
Anyway I wanted to say a few things about Huff Puff.?
1. PLL vs FLL is a debate that raged on sometimes (PLL = Phase Locked Loop, FLL = Frequency Locked Loop). A Huff Puff circuit is not exactly like either. You can make a reasonably convincing argument for why it is not a PLL or why it is not a FLL. However if the assumption, from your proof that it is not a PLL, is that therefore it must be a FLL... or vice versa - then you probably start falling into difficulty. I think not everything is as simply classifiable into one of two categories.?
2. A Huff Puff circuit doesn't exactly lock a VFO precisely on any particular frequency. What it does is compare pulse edges and try to line up the pulse edges. One is a divided down timebase, the other is the VFO. Actually which one is divided down can be swapped. It is continually hunting, around a target frequency. There are multiple stable target frequencies, separated by typically 10, 20, 30Hz etc depending on how your circuit is designed. The Huff Puff circuit will try to steer the frequency to the nearest target frequency.?
3. One critical aspect of Huff Puff is that the correction power of the circuit must be sufficient to correct any drift occurring, but not so aggressive that it overcompensates or that it does not allow you to tune the VFO normally. This is quite hard to set up properly. If the correction capability of the Huff Puff is too weak, then the VFO my drift far enough before being corrected, that the Huff Puff circuit "jumps" to trying to move it to the next stable target frequency. If the correction capability is too strong then it would make it hard for you to manually tune the VFO; additionally it makes for large excursions around the target frequency (which if extreme, could also make it "jump" to the next target frequency.?
4. If correctly set up, the Huff Puff circuit does not add much in the way of any objectionable sidebands or phase noise. In the days when PLL synthesizers were often not well designed, leading to quite high levels of phase noise, the way a Huff Puff circuit retains the cleanliness of the underlying VFO was said to be one of the advantages. That and the inherent simplicity (low parts count, at least).?
5. As Allison KB1GMX said, and what Pat G3VA said before, something like: "A Huff Puff circuit does not turn a bad VFO into a good VFO; it turns a good VFO into a better VFO". Every effort should be made, to make the VFO as good as possible before trying to add a Huff Puff circuit to make it really perfect!?
6. The "Fast" style Huff Puff circuit developed initially by Peter G7IXH, is effectively like an array of ordinary stabilizers all acting in parallel on the same VFO. What it allows you to do, is a) stabilize a worse VFO? b) stabilize a good VFO better Using it for a) is not a good idea, according to the make-the-VFO-as-good-as-possible-first principle. Stabilizing a good VFO better, means that you can make the Huff Puff corrections much smaller, it means that the frequency excursions become a lot smaller. The circuit is also a lot more forgiving when setting it up.?
7. Some practical and simple designs I worked on are here:??, which are targeted towards minimalist implementations. The 1-chip version??was an experiment to really see how far a Huff Puff stabilizer can be minimized. It is very inefficient and not easy to set up. I don't recommend it for other than curiosity value. The 2-chip "Fast" type??with discrete-component XOR gate (though an ordinary XOR gate could also be used) is a good circuit, it works reliably and efficiently and isn't fussy to set up.?
Overall Huff & Puff circuits are a bit dated now but who cares, they are really fascinating to play with and very educational.?
73 Hans G0UPL
|
Re: Qrp-labs and a Huff and Puff circuit board
Joe
I have to admit that when Hans first brought H&P to my attention several years ago it took
me several months before I was forced to admit that it was not a mixer.? Key concept? is edge
alignment between the two signals (VFO and reference clock).? Once I had set aside my
own attempt to do an Arduino version and built a simple D-type FF based version, things
began to make more sense to my feeble brain.?
My first working H&P used a 32 Hz reference from a divider on a 32 KHz crystal oscillator, with a 74HC74 as comparator and things started to work better.? From there it was just a matter
of fine tuning levels to make it actually control the VFO side of things.? Note, there is no
"lock" state in H&P.? It always slowly wanders up and down about 1 Hz around multiples
of the reference clock.? Time delay in the control loop and coupling between the varactor
and oscillator tank make its action more aggressive or less aggressive.? If too aggressive the?
frequency control will feel "sticky".? Inadequately aggressive circuits may jump tuning steps
if the VFO drift rate exceeds frequency correction rate.?
My second working version had way too much control of the VFO and refused to tune in
desired steps.? It would hold a set frequency until I had tuned the VFO several steps away
from the 32 Hz reference and then jump several steps to the nearest 32 Hz based reference
point.? After I added a series resistor in the feedback loop this build settled down and is still
being used to stabilize an old BITX40A.?
There are several ways to implement H&P.? My versions used a D-type FF to latch HIGH or LOW based on edge comparison between the LF reference and the VFO.? Just to prove a point I did
build one that reversed the HF and LF parts by dividing the VFO down to LF and comparing that
with a HF reference clock.? That works maybe better for my friends in Australia and New Zealand
where things are normally upside down.?? 8-)
Other versions of H&P are set up to always push or pull the frequency in one direction, with drift
compensation adjusted to always drift in the opposite direction.? That just confused me so I
mostly avoided this idea.
It should be possible to use some sort of discrete component multi-vibrator circuit to replace
the comparison latch.? This might be a valid approach for tube-type VFOs where the voltages
are higher than nominally 5V TTL levels.? I did model this in LTSpice but never actually built one.?
H&P is sensitive to signal levels because this affects the point where the latch (D-type FF)
senses leading or lagging conditions and toggles its output accordingly.? Adding a Schmidt-trigger
CMOS gate(s) ahead of the latch? inputs could minimize this and might reduce any jitter output
from the phase comparison action.
All of the several H&P circuits that I have built required some fine-tuning before they would
work properly.? This adds credibility to Hans` statement about H&P probably not being
something that could be offered as a kit that others could just plug into existing circuits and
expect it to work first try.?
I did go back to an Arduino based FLL (not H&P) design that counts VFO frequency and
compares that with a user-entered frequency value.? This is an easier thing to get working and it does have 3-states (too high, locked, and too low).? This does not have set tuning steps unless you design that into the software side of things.? Tuning rate can be made variable
based on how far off-frequency the measured VFO might be.? Some may disagree but this
seems closer to an FLL than a traditional H&P design.?
There are micro-controller based stabilizers that claim to be H&P but I have never seriously
tried to use or duplicate them.?
Don't know if any of this is helpful.? H&P is an interesting concept, and one that can be
implemented successfully if time is taken to fully understand how it works and to fine-tune the circuitry.
Arv _._
toggle quoted message
Show quoted text
Well last night I had a bit of a play around with the software type shift register and XOR implementation using a Sparkfun UBW board which has a PIC18 processor and a 24MHz crystal.? G3DXZ originally ran this on a PIC16 architecture with a much lower frequency crystal to get a 5Hz lock step, but I used an internal prescaler to get a very close RF sample rate of 2929.6 Hz and a shift register size of 296 bits (37 bytes) so this, according to the lore, should result in a lock step size of 2929.6 / 296 = 9.89 Hz which is as close as I could get to 10hz with this particular crystal and approach.? If I modified the code I could reduce the shift reg to 293 bits and get 9.998Hz but it is written to use a shift register which is a full multiple of 8 bits so I stuck with that and went ahead and did some testing.? Ironically today I can feed a test signal from a DDS source with high stability and adjust the frequency in 0.01Hz steps and observe the control output with the system open loop.? I used an integrator of 390Kohm feeding a 1uF on the output.? What I saw on the scope was fascinating but unfortunately I'm still a little perplexed about how this technique works!? What I observed was that the integrated output produces a heterodyne, the frequency of which is highly responsive to the exact frequency at the input and increases in amplitude as the heterodyne approaches 0 Hz.? However, I expected this behaviour to be cyclical and repeat at intervals of 9.9hz, which it did not.? It is difficult to find these lock points as they are extremely sensitive to very small changes in frequency at the input and the amplitude of the observed heterodyne diminishes rapidly as its frequency departs from DC either side and this happens within a few 0.01hz steps change of input frequency up or down from the DC output point!? So scanning the input frequency in 1 hz steps, you easily miss a strong response on the control output. At first I didn't think it was working at all and that there was a mistake in porting the code to the new architecture, but then I realized I needed to vary the input frequency much more slowly than I was.? This was fascinating and I played around for a few hours. In fact I could observe the slow drift of the DDS (sub 0.01Hz over several minutes) either that or the PIC clock crystal drifting, or both I guess. I tried various combinations of sample rate and shift register length but I was not able to observe a definite action at regular intervals of input frequency.? Also I noticed that the strength of the response (I mean amplitude of the heterodyne) varied a lot with the input frequency.? Some points had a very strong response for example I could sometimes get a swing of 4vp-p but at other input frequencies the heterodyne would only swing 70mV p-p near 0hz. Away from the frequency which produced a low frequency heterodyne, the integrator output tends to settle around 1/2vcc average with a small ac riding ther as the digital output is close to 50% duty cycle but obviously varies a little but you can't see it by looking at the digital XOR out directly.? I'm still scratching my head.? The output of the XOR has a very complex behavioir and I wish someone (Arv?) could help me understand it.? What I expected was that the duty cycle would vary between near zero and near 100% and be near 50% every 10hz but this clearly is not how it works. It doesn't appear that there is? strong action on the VFO other than at specific frequencies.? Once one of these critical frequencies is hit, I could see the system having a strong affect on the VFO to lock it but it doesn't look like there is much to drive it toward lock if it happens to be outside a small frequency range of a few hundredths of a hertz.? At this point I've spent enough time on this particular approach but I chose it first because it is so simple (physically at least) and I thought I could get something going with the least time and effort, which didn't turn out to be the case.? I guess I'll think about gearing up for the second H&P technique which uses a frequency counter and is more of a brute force approach.? I really wanted this shift register idea to work though as it seems elegant and deceptively simple, but obviously I have missed something critical. If anybody has a hint for me I'm all ears.
Joe ve3vxo
On Wed, Apr 10, 2019 at 10:47 AM Joe Street via Groups.Io <racingtheclouds= [email protected]> wrote: Hand = Hans in my last post.? Sorry Hans.
On Wed, Apr 10, 2019 at 10:45 AM Joe Street via Groups.Io <racingtheclouds= [email protected]> wrote: Thank you Hand for preserving a very cool bit of history so comprehensively on your website.? Chaz Fletcher G3DXZ also had a minimalist 1 chip stabilizer I thought was very clever and looks pretty easy to use although I haven't finished testing this yet.? It used a PIC processor and a software shift register and the XOR was done by using the bitwise XOR instruction as well.? The processor clock was the reference and it was divided down using a hardware timer overflow as an interrupt source which produced a sample rate of 2400hz and a lock step size of 5 hz.? Strangely the XOR instruction phase detector didn't work when the code was ported from PIC1684 to PIC16628 due to a change in the way the newer chip handles the carry bit and a work around was made using a few bit test instructions . I have ported this very simple code to PIC18 architecture as well if anybody wants it, let me know.
Joe ve3vxo
Hi all
Huff & Puff was a passion of mine. I was licensed in 1994, but for various personal reasons did not go on air. I did keep reading RadCom (monthly journal of the RSGB) and was fascinated by the Huff Puff articles which appeared in Pat G3VA (SK)'s monthly "Tech Topics" column. I collected everything I could find about Huff Puff and started making my Huff Puff library, eventually putting it online on my website that I created, initially just for this purpose, in 1999. So... everything grew from these roots!
In late 2001 David WN5Y emailed me and we started discussing Huff & Puff, he was using it in his "Electroluminescent Receiver" which he still to this day sells as a kit see??- and I actually finally purchased one of his kits a year ago but still have not finished building it! Anyway - as a result of that correspondence, I decided to also build my first Huff Puff circuit. It was also the first time I had built ANYTHING at all for 8 years. I wanted to try the magnetic field method of varying inductor core permeability that David used. The result was my stabilizer??and I built a 14MHz VFO that was stabilized by this circuit.?
That then became, with a mixture of other circuits also from Pat G3VA (RIP)'s column - such as the Tayloe detector (Quadrature Sampling Detector) and Polyphase networks - my first amateur radio receiver which you can read about here: .? Then I built my 1-valve (tube) CW transmitter which was also from G3VA's column.? My ATU was built around 1984 and was also a RadCom project at some point see ?
That was the station, in March 2002, that I used for my first ever QSO see??
So. This Huff Puff stuff is a very important part of my personal radio history. Later, the website was expanded to include lots of old projects, and I started adding new ones... so really 2002 was the birth of my amateur radio life.?
Anyway I wanted to say a few things about Huff Puff.?
1. PLL vs FLL is a debate that raged on sometimes (PLL = Phase Locked Loop, FLL = Frequency Locked Loop). A Huff Puff circuit is not exactly like either. You can make a reasonably convincing argument for why it is not a PLL or why it is not a FLL. However if the assumption, from your proof that it is not a PLL, is that therefore it must be a FLL... or vice versa - then you probably start falling into difficulty. I think not everything is as simply classifiable into one of two categories.?
2. A Huff Puff circuit doesn't exactly lock a VFO precisely on any particular frequency. What it does is compare pulse edges and try to line up the pulse edges. One is a divided down timebase, the other is the VFO. Actually which one is divided down can be swapped. It is continually hunting, around a target frequency. There are multiple stable target frequencies, separated by typically 10, 20, 30Hz etc depending on how your circuit is designed. The Huff Puff circuit will try to steer the frequency to the nearest target frequency.?
3. One critical aspect of Huff Puff is that the correction power of the circuit must be sufficient to correct any drift occurring, but not so aggressive that it overcompensates or that it does not allow you to tune the VFO normally. This is quite hard to set up properly. If the correction capability of the Huff Puff is too weak, then the VFO my drift far enough before being corrected, that the Huff Puff circuit "jumps" to trying to move it to the next stable target frequency. If the correction capability is too strong then it would make it hard for you to manually tune the VFO; additionally it makes for large excursions around the target frequency (which if extreme, could also make it "jump" to the next target frequency.?
4. If correctly set up, the Huff Puff circuit does not add much in the way of any objectionable sidebands or phase noise. In the days when PLL synthesizers were often not well designed, leading to quite high levels of phase noise, the way a Huff Puff circuit retains the cleanliness of the underlying VFO was said to be one of the advantages. That and the inherent simplicity (low parts count, at least).?
5. As Allison KB1GMX said, and what Pat G3VA said before, something like: "A Huff Puff circuit does not turn a bad VFO into a good VFO; it turns a good VFO into a better VFO". Every effort should be made, to make the VFO as good as possible before trying to add a Huff Puff circuit to make it really perfect!?
6. The "Fast" style Huff Puff circuit developed initially by Peter G7IXH, is effectively like an array of ordinary stabilizers all acting in parallel on the same VFO. What it allows you to do, is a) stabilize a worse VFO? b) stabilize a good VFO better Using it for a) is not a good idea, according to the make-the-VFO-as-good-as-possible-first principle. Stabilizing a good VFO better, means that you can make the Huff Puff corrections much smaller, it means that the frequency excursions become a lot smaller. The circuit is also a lot more forgiving when setting it up.?
7. Some practical and simple designs I worked on are here:??, which are targeted towards minimalist implementations. The 1-chip version??was an experiment to really see how far a Huff Puff stabilizer can be minimized. It is very inefficient and not easy to set up. I don't recommend it for other than curiosity value. The 2-chip "Fast" type??with discrete-component XOR gate (though an ordinary XOR gate could also be used) is a good circuit, it works reliably and efficiently and isn't fussy to set up.?
Overall Huff & Puff circuits are a bit dated now but who cares, they are really fascinating to play with and very educational.?
73 Hans G0UPL
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Re: Fried U3s on 12volts. Hopeless?
#u3s
Hi Chris
You may not be doing anything wrong. It's normal for the 27MHz crystal to oscillate 4 or 5 kHz too high. Why do you think the output frequency is 1.4kHz high? How are you measuring it?
73 Hans G0UPL? ?
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Show quoted text
Hello Alan, Thanks for your reply.?I have the GPS pulse set to +1 edge. I have the U3S set to GPS Mode 2: From?the manual:"2 The kit triggers on the rising (positive) edge of the 1pps signal. This is appropriate for most GPS modules, where the pulse width is 100ms for example. " The calibration?sequence forces the Ref. Freq to: 27,005,3555 , which pushes the transmissions about?1.4 khz?too high (I think).
Here is?a screenshot of my GPS settings below:
It's odd, isn't it? What am I doing wrong? -- Best regards, Chris M0XFL
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Re: Will the VFO/Signal Generator + 12M LPF be suitable as LO for QO-100 LNB use?
Hi Frenk, will try something next week - now working on LNB indepandent LO input. Will report... 73 lexa, OK1DST
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Re: Fried U3s on 12volts. Hopeless?
#u3s
Hello Alan, Thanks for your reply.?I have the GPS pulse set to +1 edge. I have the U3S set to GPS Mode 2: From?the manual:"2 The kit triggers on the rising (positive) edge of the 1pps signal. This is appropriate for most GPS modules, where the pulse width is 100ms for example. " The calibration?sequence forces the Ref. Freq to: 27,005,3555 , which pushes the transmissions about?1.4 khz?too high (I think).
Here is?a screenshot of my GPS settings below:
It's odd, isn't it? What am I doing wrong? -- Best regards, Chris M0XFL
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Re: Qrp-labs and a Huff and Puff circuit board
Well last night I had a bit of a play around with the software type shift register and XOR implementation using a Sparkfun UBW board which has a PIC18 processor and a 24MHz crystal.? G3DXZ originally ran this on a PIC16 architecture with a much lower frequency crystal to get a 5Hz lock step, but I used an internal prescaler to get a very close RF sample rate of 2929.6 Hz and a shift register size of 296 bits (37 bytes) so this, according to the lore, should result in a lock step size of 2929.6 / 296 = 9.89 Hz which is as close as I could get to 10hz with this particular crystal and approach.? If I modified the code I could reduce the shift reg to 293 bits and get 9.998Hz but it is written to use a shift register which is a full multiple of 8 bits so I stuck with that and went ahead and did some testing.? Ironically today I can feed a test signal from a DDS source with high stability and adjust the frequency in 0.01Hz steps and observe the control output with the system open loop.? I used an integrator of 390Kohm feeding a 1uF on the output.? What I saw on the scope was fascinating but unfortunately I'm still a little perplexed about how this technique works!? What I observed was that the integrated output produces a heterodyne, the frequency of which is highly responsive to the exact frequency at the input and increases in amplitude as the heterodyne approaches 0 Hz.? However, I expected this behaviour to be cyclical and repeat at intervals of 9.9hz, which it did not.? It is difficult to find these lock points as they are extremely sensitive to very small changes in frequency at the input and the amplitude of the observed heterodyne diminishes rapidly as its frequency departs from DC either side and this happens within a few 0.01hz steps change of input frequency up or down from the DC output point!? So scanning the input frequency in 1 hz steps, you easily miss a strong response on the control output. At first I didn't think it was working at all and that there was a mistake in porting the code to the new architecture, but then I realized I needed to vary the input frequency much more slowly than I was.? This was fascinating and I played around for a few hours. In fact I could observe the slow drift of the DDS (sub 0.01Hz over several minutes) either that or the PIC clock crystal drifting, or both I guess. I tried various combinations of sample rate and shift register length but I was not able to observe a definite action at regular intervals of input frequency.? Also I noticed that the strength of the response (I mean amplitude of the heterodyne) varied a lot with the input frequency.? Some points had a very strong response for example I could sometimes get a swing of 4vp-p but at other input frequencies the heterodyne would only swing 70mV p-p near 0hz. Away from the frequency which produced a low frequency heterodyne, the integrator output tends to settle around 1/2vcc average with a small ac riding ther as the digital output is close to 50% duty cycle but obviously varies a little but you can't see it by looking at the digital XOR out directly.? I'm still scratching my head.? The output of the XOR has a very complex behavioir and I wish someone (Arv?) could help me understand it.? What I expected was that the duty cycle would vary between near zero and near 100% and be near 50% every 10hz but this clearly is not how it works. It doesn't appear that there is? strong action on the VFO other than at specific frequencies.? Once one of these critical frequencies is hit, I could see the system having a strong affect on the VFO to lock it but it doesn't look like there is much to drive it toward lock if it happens to be outside a small frequency range of a few hundredths of a hertz.? At this point I've spent enough time on this particular approach but I chose it first because it is so simple (physically at least) and I thought I could get something going with the least time and effort, which didn't turn out to be the case.? I guess I'll think about gearing up for the second H&P technique which uses a frequency counter and is more of a brute force approach.? I really wanted this shift register idea to work though as it seems elegant and deceptively simple, but obviously I have missed something critical. If anybody has a hint for me I'm all ears.
Joe ve3vxo
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On Wed, Apr 10, 2019 at 10:47 AM Joe Street via Groups.Io <racingtheclouds= [email protected]> wrote: Hand = Hans in my last post.? Sorry Hans.
On Wed, Apr 10, 2019 at 10:45 AM Joe Street via Groups.Io <racingtheclouds= [email protected]> wrote: Thank you Hand for preserving a very cool bit of history so comprehensively on your website.? Chaz Fletcher G3DXZ also had a minimalist 1 chip stabilizer I thought was very clever and looks pretty easy to use although I haven't finished testing this yet.? It used a PIC processor and a software shift register and the XOR was done by using the bitwise XOR instruction as well.? The processor clock was the reference and it was divided down using a hardware timer overflow as an interrupt source which produced a sample rate of 2400hz and a lock step size of 5 hz.? Strangely the XOR instruction phase detector didn't work when the code was ported from PIC1684 to PIC16628 due to a change in the way the newer chip handles the carry bit and a work around was made using a few bit test instructions . I have ported this very simple code to PIC18 architecture as well if anybody wants it, let me know.
Joe ve3vxo
Hi all
Huff & Puff was a passion of mine. I was licensed in 1994, but for various personal reasons did not go on air. I did keep reading RadCom (monthly journal of the RSGB) and was fascinated by the Huff Puff articles which appeared in Pat G3VA (SK)'s monthly "Tech Topics" column. I collected everything I could find about Huff Puff and started making my Huff Puff library, eventually putting it online on my website that I created, initially just for this purpose, in 1999. So... everything grew from these roots!
In late 2001 David WN5Y emailed me and we started discussing Huff & Puff, he was using it in his "Electroluminescent Receiver" which he still to this day sells as a kit see??- and I actually finally purchased one of his kits a year ago but still have not finished building it! Anyway - as a result of that correspondence, I decided to also build my first Huff Puff circuit. It was also the first time I had built ANYTHING at all for 8 years. I wanted to try the magnetic field method of varying inductor core permeability that David used. The result was my stabilizer??and I built a 14MHz VFO that was stabilized by this circuit.?
That then became, with a mixture of other circuits also from Pat G3VA (RIP)'s column - such as the Tayloe detector (Quadrature Sampling Detector) and Polyphase networks - my first amateur radio receiver which you can read about here: .? Then I built my 1-valve (tube) CW transmitter which was also from G3VA's column.? My ATU was built around 1984 and was also a RadCom project at some point see ?
That was the station, in March 2002, that I used for my first ever QSO see??
So. This Huff Puff stuff is a very important part of my personal radio history. Later, the website was expanded to include lots of old projects, and I started adding new ones... so really 2002 was the birth of my amateur radio life.?
Anyway I wanted to say a few things about Huff Puff.?
1. PLL vs FLL is a debate that raged on sometimes (PLL = Phase Locked Loop, FLL = Frequency Locked Loop). A Huff Puff circuit is not exactly like either. You can make a reasonably convincing argument for why it is not a PLL or why it is not a FLL. However if the assumption, from your proof that it is not a PLL, is that therefore it must be a FLL... or vice versa - then you probably start falling into difficulty. I think not everything is as simply classifiable into one of two categories.?
2. A Huff Puff circuit doesn't exactly lock a VFO precisely on any particular frequency. What it does is compare pulse edges and try to line up the pulse edges. One is a divided down timebase, the other is the VFO. Actually which one is divided down can be swapped. It is continually hunting, around a target frequency. There are multiple stable target frequencies, separated by typically 10, 20, 30Hz etc depending on how your circuit is designed. The Huff Puff circuit will try to steer the frequency to the nearest target frequency.?
3. One critical aspect of Huff Puff is that the correction power of the circuit must be sufficient to correct any drift occurring, but not so aggressive that it overcompensates or that it does not allow you to tune the VFO normally. This is quite hard to set up properly. If the correction capability of the Huff Puff is too weak, then the VFO my drift far enough before being corrected, that the Huff Puff circuit "jumps" to trying to move it to the next stable target frequency. If the correction capability is too strong then it would make it hard for you to manually tune the VFO; additionally it makes for large excursions around the target frequency (which if extreme, could also make it "jump" to the next target frequency.?
4. If correctly set up, the Huff Puff circuit does not add much in the way of any objectionable sidebands or phase noise. In the days when PLL synthesizers were often not well designed, leading to quite high levels of phase noise, the way a Huff Puff circuit retains the cleanliness of the underlying VFO was said to be one of the advantages. That and the inherent simplicity (low parts count, at least).?
5. As Allison KB1GMX said, and what Pat G3VA said before, something like: "A Huff Puff circuit does not turn a bad VFO into a good VFO; it turns a good VFO into a better VFO". Every effort should be made, to make the VFO as good as possible before trying to add a Huff Puff circuit to make it really perfect!?
6. The "Fast" style Huff Puff circuit developed initially by Peter G7IXH, is effectively like an array of ordinary stabilizers all acting in parallel on the same VFO. What it allows you to do, is a) stabilize a worse VFO? b) stabilize a good VFO better Using it for a) is not a good idea, according to the make-the-VFO-as-good-as-possible-first principle. Stabilizing a good VFO better, means that you can make the Huff Puff corrections much smaller, it means that the frequency excursions become a lot smaller. The circuit is also a lot more forgiving when setting it up.?
7. Some practical and simple designs I worked on are here:??, which are targeted towards minimalist implementations. The 1-chip version??was an experiment to really see how far a Huff Puff stabilizer can be minimized. It is very inefficient and not easy to set up. I don't recommend it for other than curiosity value. The 2-chip "Fast" type??with discrete-component XOR gate (though an ordinary XOR gate could also be used) is a good circuit, it works reliably and efficiently and isn't fussy to set up.?
Overall Huff & Puff circuits are a bit dated now but who cares, they are really fascinating to play with and very educational.?
73 Hans G0UPL
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Re: QRP rags to riches
#qcx
I have seen RF on the paddle cable mess up other rigs even elecrafts. Using a shielded cable between the paddles and rig has worked. Ed AB8DF
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Re: QRP rags to riches
#qcx
I got the internal keyer issue
resolved.?
Oddly enough, it seems the problem was
RF feedback related to running into a dummy load that was setting
too close to the rig.? Later, when I put the rig on my dipole the
problem went away.? The long cord on my key probably didn't help.
The QCX 40 seems to be working great
this AM, heard? Chinese and Marianas Is. DX.
Power out is abt 3W on 13.8V, probably
try 16V later but want to make some heat sinking upgrades first.?
I rough calibrated it by zeroing my SDR
on WWV and then calibrated the QCX against the SDR on 40.? It's
close enough to find spots where they should be.?
The radio seems to be working fine but
the R24 and R17 adjustments did not go right.?? Both adjustments
are at minimum with the pots full CCW.? I can't "hear" any trace
of the other side band by ear, but I'd feel better abt the
situation if I could get a null.
There was a recent thread related to
that issue I'll review. ? Also could be my selections of R's
trying hit a 500 Hz CF,? might re-do those for 600 hz and see if
that flys straighter.
73 Jack KZ5A
On 4/13/2019 12:39 AM, Dave N3AC wrote:
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Try the Logitech again, with a mono plug.?
On Sat, Apr 13, 2019, 00:39
Jack Brabham - KZ5A < kz5a@...> wrote:
I just
turned it off, set it for straight key, and started using
my usual shack keyer Logikey K1.
The
internal keyer is not usable, impossible to send coherent
code.?? Not even close to being usable.
I noticed
one of the QRP kit sites has a board to "fix" QCX keying
and apparently I need one.
Same key
works fine in my K1.
73 Jack
KZ5A
On
4/12/2019 7:26 PM, Chopper wrote:
The key input is designed for a
straight key or a paddle depending on what is selected in
menu.? It does not work well with most keyers. If using a?
paddle mode B seems to work best.
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Re: Fried U3s on 12volts. Hopeless?
#u3s
the frequency offset is set wrong. With this GPS connected, it gets pushed up too high. Maybe this is to do with the 1pps signal? Chris, How far off is it? Does it stabilise?I'd think just about any PPS would work fairly well, it gets smoothed. I'm not sure about how pulse width and polarity will affect it. You have read the operating manual? 73 Alan G4ZFQ
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Have a look at " The scientist and Engineer's guide to Digital
Signal Processing " by Steven W Smith. Quote from the Book, " this
book is written for those who want to use DSP as a tool, not a new
career". Lots of examples and not lots of maths and equations.
On 13/04/2019 09:29, Richard Harris via
Groups.Io wrote:
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John,
One useful resource for phasing-type rigs is the (free)
Quadnet filter design program from Tonne Software.? This
program calculates the component values for various orders of
all pass filters (using op-amps) that approximate to wide band
90 deg phase shift networks.? The software calculates the
maximum opposite sideband suppression with these networks,
although to achieve that requires very careful construction
and setting up.?
Richard G3OTK
On Saturday, 13 April 2019, 02:21:58 BST, John VA7JBE
via Groups.Io <va7jbe@...> wrote:
Hi Alison,
I read about this a while back and have been looking
for some more information on 3rd order all pass
filters since then.? Unfortunately whatever I can find
is a bit over my head.? Could you recommend any
resources that might be a bit more accessible to the
self-taught amateur?? I'm about to have some free time
on my plate and I'd be interested in learning more
about this.
Cheers,
John VA7JBE
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Re: Fried U3s on 12volts. Hopeless?
#u3s
Hello, I just connected the wires and it burst into life.
However, I did end up logging in?to the GPS using the free software to switch some things off that we're not needed. I also?set it to UTC instead of GPS time.
But I do have one issue, the frequency offset is set wrong. With this GPS connected, it gets pushed up too high. Maybe this is to do with the 1pps signal? But I wouldn't have thought?that the 1PPS could be wrong? I'm still trying to get to the bottom of this issue. I don't know if anybody else has had this issue? I've searched the forum but did not find anything.
-- Best regards, Chris M0XFL
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John,
One useful resource for phasing-type rigs is the (free) Quadnet filter design program from Tonne Software.? This program calculates the component values for various orders of all pass filters (using op-amps) that approximate to wide band 90 deg phase shift networks.? The software calculates the maximum opposite sideband suppression with these networks, although to achieve that requires very careful construction and setting up.?
Richard G3OTK
On Saturday, 13 April 2019, 02:21:58 BST, John VA7JBE via Groups.Io <va7jbe@...> wrote:
Hi Alison,
I read about this a while back and have been looking for some more information on 3rd order all pass filters since then.? Unfortunately whatever I can find is a bit over my head.? Could you recommend any resources that might be a bit more accessible to the self-taught amateur?? I'm about to have some free time on my plate and I'd be interested in learning more about this.
Cheers,
John VA7JBE
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Re: QRP rags to riches
#qcx
Try the Logitech again, with a mono plug.?
toggle quoted message
Show quoted text
On Sat, Apr 13, 2019, 00:39 Jack Brabham - KZ5A < kz5a@...> wrote:
I just turned it off, set it for
straight key, and started using my usual shack keyer Logikey K1.
The internal keyer is not usable,
impossible to send coherent code.?? Not even close to being
usable.
I noticed one of the QRP kit sites has
a board to "fix" QCX keying and apparently I need one.
Same key works fine in my K1.
73 Jack KZ5A
On 4/12/2019 7:26 PM, Chopper wrote:
The key input is designed for a straight key or a paddle depending
on what is selected in menu.? It does not work well with most
keyers. If using a? paddle mode B seems to work best.
|
Re: QRP rags to riches
#qcx
I just turned it off, set it for
straight key, and started using my usual shack keyer Logikey K1.
The internal keyer is not usable,
impossible to send coherent code.?? Not even close to being
usable.
I noticed one of the QRP kit sites has
a board to "fix" QCX keying and apparently I need one.
Same key works fine in my K1.
73 Jack KZ5A
On 4/12/2019 7:26 PM, Chopper wrote:
toggle quoted message
Show quoted text
The key input is designed for a straight key or a paddle depending
on what is selected in menu.? It does not work well with most
keyers. If using a? paddle mode B seems to work best.
|
Re: QRP rags to riches
#qcx
The key input is designed for a straight key or a paddle depending on what is selected in menu.? It does not work well with most keyers. If using a? paddle mode B seems to work best.
|
Hi Alison,
I read about this a while back and have been looking for some more information on 3rd order all pass filters since then.? Unfortunately whatever I can find is a bit over my head.? Could you recommend any resources that might be a bit more accessible to the self-taught amateur?? I'm about to have some free time on my plate and I'd be interested in learning more about this.
Cheers,
John VA7JBE
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Re: QRP rags to riches
#qcx
Parts came in today, hoooray.?? I put the new uP in my DOA QCX 40 and it came up running.? Got thru the alignment, sort of OK but haven't got a distinct null on phase Lo.? R24, ends with up a minimum at full CCW.?? PO is abt 3 watts on 13.9V.?
I re-filtered it for ~600Hz and there may be some config parameter I missed.?? Anyway I'm listening to W1AW, sounds great.??
Couldn't use the keyer, almost impossible to make a correct character, so I put it in St Key mode and plugged in my trusty LogiKey K1 which works great.? No idea what the deal with the keyer is but I'll look into it later.
Also got my "practice Arduino" today and got stated on Jack P's book, got "blink" to work.WooHooo.
73 Jack KZ5A
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I had a persistent qcx20 bug that turned out to be cold joint on upper component side layer found only by careful exam of upper board? joints. Just a suggestion.
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Yeah, that was the first thing I checked - I soldered T1 before any other parts, and I made sure to test continuity from the pads.
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Check your solder connections on T1.? Measure from solder/pad and not the wire end.? A poor solder connection can cause BPF peaking issues.
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