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Re: Qrp-labs and a Huff and Puff circuit board
Well last night I had a bit of a play around with the software type shift register and XOR implementation using a Sparkfun UBW board which has a PIC18 processor and a 24MHz crystal.? G3DXZ originally ran this on a PIC16 architecture with a much lower frequency crystal to get a 5Hz lock step, but I used an internal prescaler to get a very close RF sample rate of 2929.6 Hz and a shift register size of 296 bits (37 bytes) so this, according to the lore, should result in a lock step size of 2929.6 / 296 = 9.89 Hz which is as close as I could get to 10hz with this particular crystal and approach.? If I modified the code I could reduce the shift reg to 293 bits and get 9.998Hz but it is written to use a shift register which is a full multiple of 8 bits so I stuck with that and went ahead and did some testing.? Ironically today I can feed a test signal from a DDS source with high stability and adjust the frequency in 0.01Hz steps and observe the control output with the system open loop.? I used an integrator of 390Kohm feeding a 1uF on the output.? What I saw on the scope was fascinating but unfortunately I'm still a little perplexed about how this technique works!? What I observed was that the integrated output produces a heterodyne, the frequency of which is highly responsive to the exact frequency at the input and increases in amplitude as the heterodyne approaches 0 Hz.? However, I expected this behaviour to be cyclical and repeat at intervals of 9.9hz, which it did not.? It is difficult to find these lock points as they are extremely sensitive to very small changes in frequency at the input and the amplitude of the observed heterodyne diminishes rapidly as its frequency departs from DC either side and this happens within a few 0.01hz steps change of input frequency up or down from the DC output point!? So scanning the input frequency in 1 hz steps, you easily miss a strong response on the control output. At first I didn't think it was working at all and that there was a mistake in porting the code to the new architecture, but then I realized I needed to vary the input frequency much more slowly than I was.? This was fascinating and I played around for a few hours. In fact I could observe the slow drift of the DDS (sub 0.01Hz over several minutes) either that or the PIC clock crystal drifting, or both I guess. I tried various combinations of sample rate and shift register length but I was not able to observe a definite action at regular intervals of input frequency.? Also I noticed that the strength of the response (I mean amplitude of the heterodyne) varied a lot with the input frequency.? Some points had a very strong response for example I could sometimes get a swing of 4vp-p but at other input frequencies the heterodyne would only swing 70mV p-p near 0hz. Away from the frequency which produced a low frequency heterodyne, the integrator output tends to settle around 1/2vcc average with a small ac riding ther as the digital output is close to 50% duty cycle but obviously varies a little but you can't see it by looking at the digital XOR out directly.? I'm still scratching my head.? The output of the XOR has a very complex behavioir and I wish someone (Arv?) could help me understand it.? What I expected was that the duty cycle would vary between near zero and near 100% and be near 50% every 10hz but this clearly is not how it works. It doesn't appear that there is? strong action on the VFO other than at specific frequencies.? Once one of these critical frequencies is hit, I could see the system having a strong affect on the VFO to lock it but it doesn't look like there is much to drive it toward lock if it happens to be outside a small frequency range of a few hundredths of a hertz.? At this point I've spent enough time on this particular approach but I chose it first because it is so simple (physically at least) and I thought I could get something going with the least time and effort, which didn't turn out to be the case.? I guess I'll think about gearing up for the second H&P technique which uses a frequency counter and is more of a brute force approach.? I really wanted this shift register idea to work though as it seems elegant and deceptively simple, but obviously I have missed something critical. If anybody has a hint for me I'm all ears. Joe ve3vxo On Wed, Apr 10, 2019 at 10:47 AM Joe Street via Groups.Io <racingtheclouds=[email protected]> wrote:
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