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Re: Qrp-labs and a Huff and Puff circuit board


 

Well last night I had a bit of a play around with the software type shift register and XOR implementation using a Sparkfun UBW board which has a PIC18 processor and a 24MHz crystal.? G3DXZ originally ran this on a PIC16 architecture with a much lower frequency crystal to get a 5Hz lock step, but I used an internal prescaler to get a very close RF sample rate of 2929.6 Hz and a shift register size of 296 bits (37 bytes) so this, according to the lore, should result in a lock step size of 2929.6 / 296 = 9.89 Hz which is as close as I could get to 10hz with this particular crystal and approach.? If I modified the code I could reduce the shift reg to 293 bits and get 9.998Hz but it is written to use a shift register which is a full multiple of 8 bits so I stuck with that and went ahead and did some testing.? Ironically today I can feed a test signal from a DDS source with high stability and adjust the frequency in 0.01Hz steps and observe the control output with the system open loop.? I used an integrator of 390Kohm feeding a 1uF on the output.? What I saw on the scope was fascinating but unfortunately I'm still a little perplexed about how this technique works!? What I observed was that the integrated output produces a heterodyne, the frequency of which is highly responsive to the exact frequency at the input and increases in amplitude as the heterodyne approaches 0 Hz.? However, I expected this behaviour to be cyclical and repeat at intervals of 9.9hz, which it did not.? It is difficult to find these lock points as they are extremely sensitive to very small changes in frequency at the input and the amplitude of the observed heterodyne diminishes rapidly as its frequency departs from DC either side and this happens within a few 0.01hz steps change of input frequency up or down from the DC output point!? So scanning the input frequency in 1 hz steps, you easily miss a strong response on the control output. At first I didn't think it was working at all and that there was a mistake in porting the code to the new architecture, but then I realized I needed to vary the input frequency much more slowly than I was.? This was fascinating and I played around for a few hours. In fact I could observe the slow drift of the DDS (sub 0.01Hz over several minutes) either that or the PIC clock crystal drifting, or both I guess. I tried various combinations of sample rate and shift register length but I was not able to observe a definite action at regular intervals of input frequency.? Also I noticed that the strength of the response (I mean amplitude of the heterodyne) varied a lot with the input frequency.? Some points had a very strong response for example I could sometimes get a swing of 4vp-p but at other input frequencies the heterodyne would only swing 70mV p-p near 0hz. Away from the frequency which produced a low frequency heterodyne, the integrator output tends to settle around 1/2vcc average with a small ac riding ther as the digital output is close to 50% duty cycle but obviously varies a little but you can't see it by looking at the digital XOR out directly.? I'm still scratching my head.? The output of the XOR has a very complex behavioir and I wish someone (Arv?) could help me understand it.? What I expected was that the duty cycle would vary between near zero and near 100% and be near 50% every 10hz but this clearly is not how it works. It doesn't appear that there is? strong action on the VFO other than at specific frequencies.? Once one of these critical frequencies is hit, I could see the system having a strong affect on the VFO to lock it but it doesn't look like there is much to drive it toward lock if it happens to be outside a small frequency range of a few hundredths of a hertz.? At this point I've spent enough time on this particular approach but I chose it first because it is so simple (physically at least) and I thought I could get something going with the least time and effort, which didn't turn out to be the case.? I guess I'll think about gearing up for the second H&P technique which uses a frequency counter and is more of a brute force approach.? I really wanted this shift register idea to work though as it seems elegant and deceptively simple, but obviously I have missed something critical. If anybody has a hint for me I'm all ears.

Joe ve3vxo


On Wed, Apr 10, 2019 at 10:47 AM Joe Street via Groups.Io <racingtheclouds=[email protected]> wrote:
Hand = Hans in my last post.? Sorry Hans.

On Wed, Apr 10, 2019 at 10:45 AM Joe Street via Groups.Io <racingtheclouds=[email protected]> wrote:
Thank you Hand for preserving a very cool bit of history so comprehensively on your website.? Chaz Fletcher G3DXZ also had a minimalist 1 chip stabilizer I thought was very clever and looks pretty easy to use although I haven't finished testing this yet.? It used a PIC processor and a software shift register and the XOR was done by using the bitwise XOR instruction as well.? The processor clock was the reference and it was divided down using a hardware timer overflow as an interrupt source which produced a sample rate of 2400hz and a lock step size of 5 hz.? Strangely the XOR instruction phase detector didn't work when the code was ported from PIC1684 to PIC16628 due to a change in the way the newer chip handles the carry bit and a work around was made using a few bit test instructions . I have ported this very simple code to PIC18 architecture as well if anybody wants it, let me know.



Joe ve3vxo

On Wed, Apr 10, 2019 at 9:55 AM Hans Summers <hans.summers@...> wrote:
Hi all

Huff & Puff was a passion of mine. I was licensed in 1994, but for various personal reasons did not go on air. I did keep reading RadCom (monthly journal of the RSGB) and was fascinated by the Huff Puff articles which appeared in Pat G3VA (SK)'s monthly "Tech Topics" column. I collected everything I could find about Huff Puff and started making my Huff Puff library, eventually putting it online on my website that I created, initially just for this purpose, in 1999. So... everything grew from these roots!

In late 2001 David WN5Y emailed me and we started discussing Huff & Puff, he was using it in his "Electroluminescent Receiver" which he still to this day sells as a kit see??- and I actually finally purchased one of his kits a year ago but still have not finished building it! Anyway - as a result of that correspondence, I decided to also build my first Huff Puff circuit. It was also the first time I had built ANYTHING at all for 8 years. I wanted to try the magnetic field method of varying inductor core permeability that David used. The result was my stabilizer??and I built a 14MHz VFO that was stabilized by this circuit.?

That then became, with a mixture of other circuits also from Pat G3VA (RIP)'s column - such as the Tayloe detector (Quadrature Sampling Detector) and Polyphase networks - my first amateur radio receiver which you can read about here: .?
Then I built my 1-valve (tube) CW transmitter which was also from G3VA's column.?
My ATU was built around 1984 and was also a RadCom project at some point see ?

That was the station, in March 2002, that I used for my first ever QSO see??

So. This Huff Puff stuff is a very important part of my personal radio history. Later, the website was expanded to include lots of old projects, and I started adding new ones... so really 2002 was the birth of my amateur radio life.?

Anyway I wanted to say a few things about Huff Puff.?

1. PLL vs FLL is a debate that raged on sometimes (PLL = Phase Locked Loop, FLL = Frequency Locked Loop). A Huff Puff circuit is not exactly like either. You can make a reasonably convincing argument for why it is not a PLL or why it is not a FLL. However if the assumption, from your proof that it is not a PLL, is that therefore it must be a FLL... or vice versa - then you probably start falling into difficulty. I think not everything is as simply classifiable into one of two categories.?

2. A Huff Puff circuit doesn't exactly lock a VFO precisely on any particular frequency. What it does is compare pulse edges and try to line up the pulse edges. One is a divided down timebase, the other is the VFO. Actually which one is divided down can be swapped. It is continually hunting, around a target frequency. There are multiple stable target frequencies, separated by typically 10, 20, 30Hz etc depending on how your circuit is designed. The Huff Puff circuit will try to steer the frequency to the nearest target frequency.?

3. One critical aspect of Huff Puff is that the correction power of the circuit must be sufficient to correct any drift occurring, but not so aggressive that it overcompensates or that it does not allow you to tune the VFO normally. This is quite hard to set up properly. If the correction capability of the Huff Puff is too weak, then the VFO my drift far enough before being corrected, that the Huff Puff circuit "jumps" to trying to move it to the next stable target frequency. If the correction capability is too strong then it would make it hard for you to manually tune the VFO; additionally it makes for large excursions around the target frequency (which if extreme, could also make it "jump" to the next target frequency.?

4. If correctly set up, the Huff Puff circuit does not add much in the way of any objectionable sidebands or phase noise. In the days when PLL synthesizers were often not well designed, leading to quite high levels of phase noise, the way a Huff Puff circuit retains the cleanliness of the underlying VFO was said to be one of the advantages. That and the inherent simplicity (low parts count, at least).?

5. As Allison KB1GMX said, and what Pat G3VA said before, something like: "A Huff Puff circuit does not turn a bad VFO into a good VFO; it turns a good VFO into a better VFO". Every effort should be made, to make the VFO as good as possible before trying to add a Huff Puff circuit to make it really perfect!?

6. The "Fast" style Huff Puff circuit developed initially by Peter G7IXH, is effectively like an array of ordinary stabilizers all acting in parallel on the same VFO. What it allows you to do, is
a) stabilize a worse VFO?
b) stabilize a good VFO better
Using it for a) is not a good idea, according to the make-the-VFO-as-good-as-possible-first principle. Stabilizing a good VFO better, means that you can make the Huff Puff corrections much smaller, it means that the frequency excursions become a lot smaller. The circuit is also a lot more forgiving when setting it up.?

7. Some practical and simple designs I worked on are here:??, which are targeted towards minimalist implementations. The 1-chip version??was an experiment to really see how far a Huff Puff stabilizer can be minimized. It is very inefficient and not easy to set up. I don't recommend it for other than curiosity value. The 2-chip "Fast" type??with discrete-component XOR gate (though an ordinary XOR gate could also be used) is a good circuit, it works reliably and efficiently and isn't fussy to set up.?

Overall Huff & Puff circuits are a bit dated now but who cares, they are really fascinating to play with and very educational.?

73 Hans G0UPL

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