A low cost FPGA would be my choise as well.?
I was unaware of the evaluation board, but would have used sata cables on my planed test board.?
They just are so cheap and convenient.?
The hackRF sdr radio uses a somewhat similar construction.?
A xilinx cpld is used between the nxp lpc series mcu and the maxim analog baseband chip.
As for stm32f4's adc, its only 7msps in interleaved mode.
Without interleaving it's only 2.4msps.?
But that would be enough with an IF slightly below 1.2MHz