开云体育

@Alex: Thanks for your suggestion ... I am actually aware of the Analog Discovery, however, its usable band-width is too low for my purposes. Also, its intrinsic noise level is quite high thus not really providing any benefit from its high resolution ADCs (although it may be fine for PDN measurements). Additionally, the bandwidth available IIRC is only available on the ADC whereas the generator outputting the signal to be used in the PDN calculations only goes to 12 or 15 MHz'ish. If I had the money I would buy their new Pro version (here assuming that the input noise level is much lower) - but currently I just don't.

In the last couple of days I have been reading into the use of Joe Smith's software and my feel is that there would be a learning curve but that I can do this in a sort of "segmented" way, i.e. topic by topic. The only real issue that I have not been able to find a solution for is where to find & buy this original nanoVNA (again, preferably in the EU) so that I can be sure that - given correct upgrades - it will work without hazzles. I have found this one which appears to be original (developed by Hugen) but I'm not sure that it is the one Joe Smith refers to. Would you happen to know about this?



To this end I would still very much appreciate a link to the Aliexpress shop where you bought your nanoVNA since it works with his software.

Cheers from Denmark,

Jesper M

If you see the unit is in bootloader mode, did you run Dfusedemo and see if it shows up in the upper left area as being in bootloader?
There are a number of messgae threads from just over a month ago regarding this.

Please do a search for "dfu mode" in the message area.

@Jesper,
Another thing You might give a try with all this decoupling networks measurements might be "Analog Discovery" from Digilent, which covers frequencies from DC to 25 MHz.
Though not very clear how to perform all those low-Z load calibrations with this kit, but it has a very User-friendly SW GUI , much easier to work with.
--
Regards,
Alex

I have had this NanoVNA-H4 (nanovna.com) for a little over a year now and just saw that there are firmware upgrades. It came loaded with Version 0.5.0 with a build date of Feb 21, 2020.

I am having no success inc connecting this to my PC. I am running windows 10, 64 Bit OS. I downloaded, unzipped and installed the ST Driver DfuSe_Demo_V3.0.6_Setup.exe. The program installed fine.

I've tried two ways to put the nanoVNA into the update mode, first by powering off, pushing the selector button in and powering which is supposed to put it into the update mode. I did get the black screen indicating that it indeed was. When I launch DfuSeDemo it doesn't see the nanoVNA. Next I removed it from the case and shorted the two pins with the same result.

If I launch Windows Device Manager and look under USB Serial Bus Devices, I see STM32 BOOTLOADER when the NanoVNA is in the update mode. I

Any ideas what I am doing wrong? I suspect this is a Windows driver issue.

Also, if I may, what firmware should I update this to?

Thank you!

Ok ... Looks interesting and probably also challenging in different ways than what I am working on ... Thanks for partly settling my curiosity ;-)

Jesper

On 2/27/22 8:50 AM, moensted1@... wrote:

@ Jim : Thanks Jim for considering & commenting. I think I will try it out then - possibly with a JFET probe in-between the PSU & the VNA to see if there are any differences between the end of a 50 ohm coax (with suitable DC isolation) and the JFET probe.

Now, then I "just" need to find out which nanoVNA will work with Joe Smith's software and also go sufficiently low in frequency ...

BTW: Can I ask what you are working with (or "hobbying with") since you work with ADCs?

Cheers,

that was for a Software Defined Radio that was part of the SCaN Testbed on ISS

@ Jim : Thanks Jim for considering & commenting. I think I will try it out then - possibly with a JFET probe in-between the PSU & the VNA to see if there are any differences between the end of a 50 ohm coax (with suitable DC isolation) and the JFET probe.

Now, then I "just" need to find out which nanoVNA will work with Joe Smith's software and also go sufficiently low in frequency ...

BTW: Can I ask what you are working with (or "hobbying with") since you work with ADCs?

Cheers,

Jesper

On 2/27/22 12:07 AM, moensted1@... wrote:

Hi all - many inputs and much to consider - but thanks! I'll address your feedbacks in sequence below:

@Jim : Thanks for commenting above and also your setting up/linking to your ADC interference measurements. However, I'm actually after something else in what I'd like to measure ...

As it is I have for some time now been trying to simulate (in LTSpice) a myriad of different combinations of capacitors in order to setup a low impedance - and importantly - straight impedance PSU supply network for ADCs or DACs. As you may/likely know MLCCs typically have relatively narrow low impedance spikes and then the MLCC impedance rise on both sides of this "spike". Combining more/many capacitors leads to anti/parallel resonances which may end up to unevenly attenuate - or actually amplify - the PSU network noise at these anti/parallel resonances unless capacitor capacitance values are close to each other (and "same type capacitor").

Additionally, according to an IC designer, many ICs include "hidden" PSU line capacitances inserted by the IC designers to mitigate internal IC issues with the combination of inductance etc. on these IC PSU lines.


What I'd like to establish is a better coherence between these LTSpice PSU supply network simulations and the real world impedance response of a DAC/ADC PSU supply network. That is: injecting a signal into the PSU supply network (e.g. the CH0 of the VNA) - while the DAC is powered on but not "active" (i.e. no clock or data signals) - and then measure the impedance characteristics of the PSU supply network with the VNAs CH1.

So you'd hook up CH1 at the power pin on the IC?? - That might work. You might need a buffer amplifier to turn it into a High Z probe, so the 50 ohm impedance of the VNA doesn't load down the network.

I recently did a trial where I relatively carefully adapted capacitances etc. in such a DAC PSU network and then measured the noise on the network with an FFT (maximum 200 MHz - picoscope oscilloscope).

That's a High Z probe, effectively.

I then compared this noise with the noise on the same DAC with the ubiquitous 100 nF decoupling capacitor in place instead (sampling frequency 384 kHz ~ 24.576 MHz clock). The PSU network noise on average dropped 10-15 dBs with the adapted network. I suppose it is likely that the noise spikes I measured coincide with the impedance peaks on the PSU supply network but I can't be sure of this and would like to be able to measure the impedance/vs frequency in a way that I can also see how it interacts with the DAC's internal PSU network.

Anyway, this is why I would like to use a VNA - and then also for characterizing passive components. I hope it is clearer now ...? I am just unsure whether the square wave output of the VNA will mess up things (provoke component non-linearities, DAC odd responses) - or it may work ... ???

As long as you are measuring a linear system (which your LCR "decoupling network is) at single frequencies, the harmonics of the square wave shouldn't make any difference. If you're measuring it hooked up to the load (your DAC), it's possible that some circuitry inside the DAC might have some IMD, but on the other hand, the square wave is on the *input* of the decoupling network, which is generally a low pass.

Hi all - many inputs and much to consider - but thanks! I'll address your feedbacks in sequence below:

@Jim : Thanks for commenting above and also your setting up/linking to your ADC interference measurements. However, I'm actually after something else in what I'd like to measure ...

As it is I have for some time now been trying to simulate (in LTSpice) a myriad of different combinations of capacitors in order to setup a low impedance - and importantly - straight impedance PSU supply network for ADCs or DACs. As you may/likely know MLCCs typically have relatively narrow low impedance spikes and then the MLCC impedance rise on both sides of this "spike". Combining more/many capacitors leads to anti/parallel resonances which may end up to unevenly attenuate - or actually amplify - the PSU network noise at these anti/parallel resonances unless capacitor capacitance values are close to each other (and "same type capacitor").

Additionally, according to an IC designer, many ICs include "hidden" PSU line capacitances inserted by the IC designers to mitigate internal IC issues with the combination of inductance etc. on these IC PSU lines.


What I'd like to establish is a better coherence between these LTSpice PSU supply network simulations and the real world impedance response of a DAC/ADC PSU supply network. That is: injecting a signal into the PSU supply network (e.g. the CH0 of the VNA) - while the DAC is powered on but not "active" (i.e. no clock or data signals) - and then measure the impedance characteristics of the PSU supply network with the VNAs CH1.


I recently did a trial where I relatively carefully adapted capacitances etc. in such a DAC PSU network and then measured the noise on the network with an FFT (maximum 200 MHz - picoscope oscilloscope). I then compared this noise with the noise on the same DAC with the ubiquitous 100 nF decoupling capacitor in place instead (sampling frequency 384 kHz ~ 24.576 MHz clock). The PSU network noise on average dropped 10-15 dBs with the adapted network. I suppose it is likely that the noise spikes I measured coincide with the impedance peaks on the PSU supply network but I can't be sure of this and would like to be able to measure the impedance/vs frequency in a way that I can also see how it interacts with the DAC's internal PSU network.

Anyway, this is why I would like to use a VNA - and then also for characterizing passive components. I hope it is clearer now ...? I am just unsure whether the square wave output of the VNA will mess up things (provoke component non-linearities, DAC odd responses) - or it may work ... ???

But, again thanks for taking the time to post about your ADC interferences ;-). Often can be a challenge to handle (would have liked to insert a slightly sad smiley here) ...

@AlexSpb: Thanks for the link. I read a bit into it, however, it is many hundred posts which is a bit overwhelming ... Do you have somewhere special - a/some special post(s) - some special information - in mind?

@Clyde Lambert & Dragan Milijovic: thanks also for your feedbacks but when going to Joe's github repository I cannot see a special link to the liteVNA ... ?



Can I just either use the software for the nanoVNA or the NanoVNA_V2Plus - or is there a special liteVNA version download link somewhere that I've missed?

Cheers & have a good day,

Jesper

No. JoeSmit software works with the original (H), V2 and the latest with
LiteVNA.

If you check the video it has a link to his software. However, it is not for the "original" NanoVNA H. It is for the NanoVNA version 2. The V2, is a redesigned version of the Original NanoVNA H. So if you want to run his software, you will need a NanoVNA V2.
Clyde KC7BJE

Hi, Jesper,
Before You start working with NanoVNA and Joe's SW, take a look at this thread and the following discussion


--
Alex

Jim, I was working for HP when Tektronix loaned us one of their early
engineering models of their FFT'ed spectrum analyzer. They just requested
we document what we found. Well,..... it was OK on discrete single-signal
inputs, but,....... with digitally modulated signals, it severely aliased
throughout its RF range. We assured there was no overload and that we were
operating it well below anything that might have influenced its behavior.
A month later, we gave it back to Tek with only one comment - that which I
have related. As far as application with digital circuitry and equipment,
it was useless.

Dave - W?LEV

--
*Dave - W?LEV*
*Just Let Darwin Work*

On 2/26/22 8:54 AM, Jim Lux wrote:

Attached are a couple plots of the processed digital output of an ADC, where there was leakage of an external clock signal into the system.? Sample rate is about 49.2 MHz, interference signal is 66 MHz, Signal being digitized is ~110 MHz (aliased down to about 12 MHz) - 12 bit ADC

You can see that there's really no direct sign of the 66 MHz in the output (e.g. 66 MHz would have aliased to 1.34 MHz), but there's plenty of IMD with the interaction of the 66MHz and the 110 MHz/12 MHz input

Excuse me - 66 MHz aliases to 16.8 MHz ( 66/49.2 = 1.34 - 1 = 0.34 * 49.2 = 16.8)? - Too early in the morning.

Attached are a couple plots of the processed digital output of an ADC, where there was leakage of an external clock signal into the system.? Sample rate is about 49.2 MHz, interference signal is 66 MHz, Signal being digitized is ~110 MHz (aliased down to about 12 MHz) - 12 bit ADC

You can see that there's really no direct sign of the 66 MHz in the output (e.g. 66 MHz would have aliased to 1.34 MHz), but there's plenty of IMD with the interaction of the 66MHz and the 110 MHz/12 MHz input

On 2/25/22 8:39 AM, moensted1@... wrote:

@ Jim Lux:

So the idea is to feed a test signal (not from the VNA) into the ADC, and use the VNA to inject power supply noise into the system, and then measure the effect? Since the VNA is analog out and analog in, you'd run an ADC/DAC back to back, and use the DAC output to feed the VNA's receiver port.

To be honest, the way I've done this is by processing the digitized samples offline, and using a nice pure sinewave as the test signal into the ADC. If you want to do it in the analog domain, then a spectrum analyzer might be a better "readout" device. <<

No, it actually is to feed the output from the VNA into the PDN / supply decoupling network e.g. of a DAC while the DAC is powered on but not receiving data or clock signals. Joe Smith outlines how the part with a powered-up device can be done in his video on youtube. Thus the intrinsic capacitances/inductances/resistances of the DAC PSU pins may be measured together with the decoupling capacitors. However, I am unsure of the effect that the square wave from the nanoVNA will have .. ? Will it perturb into the DAC's circuitries and confuse matters - or will it reliably give a good impression of the PDN + DAC impedance network?

I hope this clarifies things (and thanks again for considering and replying ;-))?

Right, so CH0 of the VNA connects to the DAC power (through some coupling network). And then you'd hook the output of the DAC to CH1 (through some coupling network to block DC).? And you'd directly measure the Power Supply rejection.

Yeah, that might work.

What that would catch is any harmonic distortion caused by the interference (since the VNA is only looking at the stimulus frequency).? The typical problem with data converters and poor decoupling is that you get an interaction between the sample rate and the spurious signal (often clock noise at a different frequency) and the desired signal.? The VNA won't find that.? A spectrum analyzer would.

Looking at it the other direction (with ADCs) you put in a very clean sinewave at f1 and a small ripple on the power supply at f2, and sample clock f3. When you collect a bunch of samples and then look at the power spectrum, you'll see not only f1 (as expected), and f2 (maybe), but you also see f1+f2 or f1-f2 (and all the possible multiples, really n*f1 +/- m*f2), as well as combinations of f2,f3 and f1.? I had this specific problem with a ADC running at 50 MHz sample rate and 66 MHz from the CPU clock leaking in on the power supply. With an input signal at 12 MHz, you'd see other spurs.

On a DAC (i've never tried this) you would put a sequence into the DAC expected to generate a particular frequency f1.? Then you'd inject f2 into the power (or clock) as an interferer, and look at the analog spectrum output to see if there's anything other than f1, f1+/-fs, etc.? I suppose you could do it with a DAC putting out DC (fixed input code), but the leakage effects there are likely to be different than in the dynamic case. (Unless the DAC is something where it's basically providing a DC setpoint, say as electronic frequency control to a TCXO, in which case the interference would show up as FM or PM on the TCXO output)

@ Jim Lux:

So the idea is to feed a test signal (not from the VNA) into the ADC, and use the VNA to inject power supply noise into the system, and then measure the effect? Since the VNA is analog out and analog in, you'd run an ADC/DAC back to back, and use the DAC output to feed the VNA's receiver port.

To be honest, the way I've done this is by processing the digitized samples offline, and using a nice pure sinewave as the test signal into the ADC. If you want to do it in the analog domain, then a spectrum analyzer might be a better "readout" device. <<

No, it actually is to feed the output from the VNA into the PDN / supply decoupling network e.g. of a DAC while the DAC is powered on but not receiving data or clock signals. Joe Smith outlines how the part with a powered-up device can be done in his video on youtube. Thus the intrinsic capacitances/inductances/resistances of the DAC PSU pins may be measured together with the decoupling capacitors. However, I am unsure of the effect that the square wave from the nanoVNA will have .. ? Will it perturb into the DAC's circuitries and confuse matters - or will it reliably give a good impression of the PDN + DAC impedance network?

I hope this clarifies things (and thanks again for considering and replying ;-))?

Cheers,

Jesper

On 2/25/22 7:48 AM, moensted1@... wrote:

Hi all - & thanks very much for your prompt replies!

@Jim Lux:

Also, bear in mind that the stimulus on the NanoVNAs is a square-ish wave, not a nice clean sine wave with low distortion and spurs. <<

.. Hmmm, yes, I am aware of this, however, I just do not know how it will affect the circuitry in question, so I thought I'd give it a chance. But maybe you have experiences with this already?

Gotcha - that's kind of what I thought, but the OP mentioned ADCs and DACs. And that is a different kettle of fish, measurement wise. <<

.. What I would like to be able to measure impedance/frequency-wise is the interaction between the decoupling capacitors and the DAC or ADC and the placement of Vias etc. I can simulate this to some extent but not having expensive software available I cannot be absolutely sure these simulations are correct. And then - as I understand it - there may also be "hidden" internal decoupling capacitances in the DAC/ADCs that may alter the response of the DAC/ADC PSU pin responses .. So it just would be great to be able to verify things by measurement - that is also not too expensive.

So the idea is to feed a test signal (not from the VNA) into the ADC, and use the VNA to inject power supply noise into the system, and then measure the effect?? Since the VNA is analog out and analog in, you'd run an ADC/DAC back to back, and use the DAC output to feed the VNA's receiver port.

To be honest, the way I've done this is by processing the digitized samples offline, and using a nice pure sinewave as the test signal into the ADC. If you want to do it in the analog domain, then a spectrum analyzer might be a better "readout" device.

@AlexSpb:

Regarding "original NanoVNA", I just have purchased one of the cheap clones from AliExpress, that are still available. <<

Ok, great! Any chance you have a link to the one you bought? Might it be identical to this one: ... apparently this is a "Hugen" version but if I am not mistaken these "H" versions are exactly the ones Joe mentions in the video may have firmware errors ... ? But maybe this is corrected with:

Then just flashed it with the recommended FW version from Joe's git repo. << ...

Well, admittedly I am not a programmer so I hope I can also ask you to verify that you downloaded this software: nanoVNA_original_2p10.zip from the link below?



Or is there some other software that I am missing here?

I'd appreciate your feedbacks - new to this so insights are really appreciated ;-)

Cheers & thanks,

Jesper

Hi all - & thanks very much for your prompt replies!

@Jim Lux:

Also, bear in mind that the stimulus on the NanoVNAs is a square-ish wave, not a nice clean sine wave with low distortion and spurs. <<

.. Hmmm, yes, I am aware of this, however, I just do not know how it will affect the circuitry in question, so I thought I'd give it a chance. But maybe you have experiences with this already?

Gotcha - that's kind of what I thought, but the OP mentioned ADCs and DACs. And that is a different kettle of fish, measurement wise. <<

.. What I would like to be able to measure impedance/frequency-wise is the interaction between the decoupling capacitors and the DAC or ADC and the placement of Vias etc. I can simulate this to some extent but not having expensive software available I cannot be absolutely sure these simulations are correct. And then - as I understand it - there may also be "hidden" internal decoupling capacitances in the DAC/ADCs that may alter the response of the DAC/ADC PSU pin responses .. So it just would be great to be able to verify things by measurement - that is also not too expensive.

@AlexSpb:

Regarding "original NanoVNA", I just have purchased one of the cheap clones from AliExpress, that are still available. <<

Ok, great! Any chance you have a link to the one you bought? Might it be identical to this one: ... apparently this is a "Hugen" version but if I am not mistaken these "H" versions are exactly the ones Joe mentions in the video may have firmware errors ... ? But maybe this is corrected with:

Then just flashed it with the recommended FW version from Joe's git repo. << ...

Well, admittedly I am not a programmer so I hope I can also ask you to verify that you downloaded this software: nanoVNA_original_2p10.zip from the link below?



Or is there some other software that I am missing here?

I'd appreciate your feedbacks - new to this so insights are really appreciated ;-)

Cheers & thanks,

Jesper

On 2/25/22 6:38 AM, AlexSpb wrote:

PDN means "power distribution networks", an odd term that had appeared for those low-Z nets of filtering MLCC caps in power rails, etc. ))
All this nets are characterized by very low Z at low frequency band starting from DC to a couple of MHz.

Gotcha - that's kind of what I thought, but the OP mentioned ADCs and DACs.? And that is a different kettle of fish, measurement wise.

Regarding "original NanoVNA", I just have purchased one of the cheap clones from AliExpress, that are still available.
Then just flashed it with the recommended FW version from Joe's git repo.