Yes parallel JFETs can lower the noise at the signal gain is linear and the noise being random ?adds as root 2 or 41.4% for each doubling. Eventually the gate capacitance will be an issue.
Andrew VK5CV.
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I would agree.
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However, I seem to remember reading that parallelling FET's can improve the overall noise performance, but can't find the reference to quote.
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It does however reduce the input impedance. This is not too much of an issue, as many E-Field amplifier circuits have far too high a value anyway, but there is a compromise to be reached in terms of the number of FETs used in a practical implementation.
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Regards,
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Martin
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On Fri, Mar 21, 2025 at 12:23 PM, Tom - VE3PSZ wrote:
So the benefit in my opinion is not noise reduction, but large signal handling.
