?? There is a reference here to Andy Ikin's paralleling of FETs, lowering the noise figure.
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???The antenna uses 8 very high gain JFETs in parallel push-pull with a Bipolar transistor cascode stage for extended bandwidth.
?? A very low amplifier noise floor is achieved by dynamically decreasing the JFET Source resistance to a fraction of an Ohm.
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? Regards
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??Tracey
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----- Original Message -----
Sent: 21/03/2025 12:29:26
Subject: Re: [loopantennas] Modified AMRAD
I would agree.
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However, I seem to remember reading that parallelling FET's can improve the overall noise performance, but can't find the reference to quote.
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It does however reduce the input impedance. This is not too much of an issue, as many E-Field amplifier circuits have far too high a value anyway, but there is a compromise to be reached in terms of the number of FETs used in a practical implementation.
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Regards,
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Martin
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On Fri, Mar 21, 2025 at 12:23 PM, Tom - VE3PSZ wrote:
So the benefit in my opinion is not noise reduction, but large signal handling.
