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Vida to Path clearance


 

Hi All,

is there a way to set specific clearance between via and track?

In PCB Editor File->Board Setup->Net Classes I can only modify the 'clearance' which, I suppose, is the same for track to track as well as track to via. Several production sites however provide different specifications for via2track and track2track clearances. Obviously the latter is usually smaller.

It would be nice to have it in kicad as well, thus my question.

Regards,
Milosz


 

Are you sure the spacing you are reading is via to track and not via hole to track??

I don't think there is much reason to set a different spacing between any particular copper areas.? But on inner layers, you can have vias with no pad on that layer, so there is a different requirement for spacing from the via hole to a trace.?

--

Rick Collins

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On 30.01.23 02:19, Rick Collins wrote:
Are you sure the spacing you are reading is via to track and not via /*hole*/ to track?
Hi,

yes, it's part of the capability specification from JLCPCB:


If you scroll down to 'minimum clearance' there is an entry like:
Via to Track 0.254mm

But a little further down the page you'll find 'Minimum trace width and spacing', where min. track width and min. track clearance is specified as:
1-2 Layers 5mil (0.127mm) 5mil (0.127mm)


I just realized it few days ago as I wanted to create a really tiny PCB. In kicad I had to use 0.524mm for both clearances wasting some space, when assembling by JLCPCB.

I don't think there is much reason to set a different spacing between any particular copper areas.? But on inner layers, you can have vias with no pad on that layer, so there is a different requirement for spacing from the via hole to a trace.
Well JLCPCB provides track to hole clearances as well:
PTH to Track 0.33mm
NPTH to Track 0.254mm

I would assume the different specs for via2track and track2track clearance arise from their manufacturing tolerances.

-Milosz


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Rick Collins
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You will need to ask JLCPCB then.? I've always found their web site to be confusing, with unclear terminology.? This makes no sense to me.? Copper to copper should be the same regardless of which copper it is.

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Rick Collins

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What is confusing about the pictures here?

Then look under minimum clearance, and the last picture seems to be what the OP is asking about.
The pad to track dimension seems to match the PTH to track dimension plus the minimum annular ring dimension, which is what I would expect.

The NPTH to track dimension will be different because there will be no annular ring (despite showing one in the picture).



On Tue, 31 Jan 2023 at 15:47, Rick Collins <gnuarm.2007@...> wrote:
You will need to ask JLCPCB then.? I've always found their web site to be confusing, with unclear terminology.? This makes no sense to me.? Copper to copper should be the same regardless of which copper it is.

--

Rick Collins

? - Get 1,000 miles of free Supercharging
? - Tesla referral code -


 

The math works out only for 1 oz. copper.? For 2 oz copper, they specify a larger annular ring, but not a larger via hole to trace spec.? This is a lot of work to double check all the parameters.? They're terminology is not good, e.g. using "via" to mean the via hole, rather than the pad.? They make it even worse by mixing dimensions, mil and mm.?

--

Rick Collins

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Jerry Durand
 

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I understand the larger ring, for PTH the hole is overdrilled and then plated back to size.? Heavier copper = larger overdrill.

On 01/02/2023 03:09, Rick Collins wrote:

The math works out only for 1 oz. copper.? For 2 oz copper, they specify a larger annular ring, but not a larger via hole to trace spec.? This is a lot of work to double check all the parameters.? They're terminology is not good, e.g. using "via" to mean the via hole, rather than the pad.? They make it even worse by mixing dimensions, mil and mm.?

--

Rick Collins



 

Hi!

The
are IMO inconsistent in many aspects. Identical pictograms are used
for different values, indeed leading to confusion.

And I asked the staff directly via the online chat, why there is a
difference in between track-pad (PTH) spacing vs. track-track spacing.

The answer was "pls wait"; then "still checking" and then
"The chat has been closed due to long user inactivity."

-> good luck.

Greets,

Clemens

On 1/31/23 21:43, Alan Pearce via groups.io wrote:
What is confusing about the pictures here?
<>
Then look under minimum clearance, and the last picture seems to be what the OP is asking about.
The pad to track dimension seems to match the PTH to track dimension plus the minimum annular ring dimension, which is what I would expect.
The NPTH to track dimension will be different because there will be no annular ring (despite showing one in the picture).
On Tue, 31 Jan 2023 at 15:47, Rick Collins <gnuarm.2007@... <mailto:gnuarm.2007@...>> wrote:
You will need to ask JLCPCB then.? I've always found their web site to be confusing, with unclear terminology.? This makes no sense to me.? Copper to copper should be the same regardless of which copper it is.
--
Rick Collins
? - Get 1,000 miles of free Supercharging
? - Tesla referral code - <>


 

Yeah, well, that is most likely a chat bot with no-one on the other end. That seems to be the case with those things as I understand it.

While they use identical pictograms they DO dimension correctly for the dimension they are providing, and if one can't follow the dimension lines ...

A difference between track-pad and track-track spacing will be normal to allow for soldering of pads. Even vias will require extra space for manufacturing tolerancing.

On Wed, 1 Feb 2023 at 16:44, Clemens Koller <cko@...> wrote:
Hi!

The
are IMO inconsistent in many aspects. Identical pictograms are used
for different values, indeed leading to confusion.

And I asked the staff directly via the online chat, why there is a
difference in between track-pad (PTH) spacing vs. track-track spacing.

The answer was "pls wait"; then "still checking" and then
"The chat has been closed due to long user inactivity."

-> good luck.

Greets,

Clemens


 

Hi!

On 2/1/23 19:01, Alan Pearce via groups.io wrote:
Yeah, well, that is most likely a chat bot with no-one on theother end. That seems to be the case with those things as I understand it.
I had the impression there was a human at the other end.
But good point. Next time, I'll ask a sqrt(64)+34=? question before I
continue wasting my time.

While they use identical pictograms they DO dimension correctly
for the dimension they are providing, and if one can't follow the dimension lines ...

I tend to disagree:
Via-to-Track = 0.254mm = PictureX
PTH-to-Track = 0.33mm = same PictureX
NPTH-to-Track = 0.254mm = same PictureX, which, btw. shows a PTH and not a NPTH.

A difference between track-pad and track-track spacing will be normal
to allow for soldering of pads.
I disagree when details are missing.
JLCPCB's seems to be mixing up PTH / NPTH and non drilled SMT Pads.

Anyway:
It seems to be advisable to send them your data to check their rules
for you. Maybe they are right, then. Only if you get a written
commitment, you can pull the trigger to go.

I have a good set of rules for my boards settled over the years which
can be manufactured at a known set of HDI-Houses. And I know where
the limitations are of some of them. Those are mostly originates not
due to the design rules, but more like in their manufacturing process.
E-Test failed because of open Vias (aspect ratio was 8:1 and they said
they are able to do that) because there was air trapped in the Via
(A shaker/vibrator thingy in the chemical bath was broken.)
Or we had Via barrel ruptures because of a failed de-smearing process.
The E-Test was okay after manufacturing... but after soldering we
ran into failing boards... You can guess, it was an lengthly discussion
about who will be responsible for the damage.
Good that we saved soldering temperature profiles...


Greets,

Clemens


On Wed, 1 Feb 2023 at 16:44, Clemens Koller <cko@... <mailto:cko@...>> wrote:
Hi!
The <>
are IMO inconsistent in many aspects. Identical pictograms are used
for different values, indeed leading to confusion.
And I asked the staff directly via the online chat, why there is a
difference in between track-pad (PTH) spacing vs. track-track spacing.
The answer was "pls wait"; then "still checking" and then
"The chat has been closed due to long user inactivity."
-> good luck.
Greets,
Clemens


 



On Thu, 2 Feb 2023 at 18:45, Clemens Koller <cko@...> wrote:
Hi!

On 2/1/23 19:01, Alan Pearce via wrote:
...
>> While they use identical pictograms they DO dimension correctly
>> for the dimension they are providing, and if one can't follow the dimension lines ...

I tend to disagree:
Via-to-Track = 0.254mm = PictureX
PTH-to-Track = 0.33mm = same PictureX
NPTH-to-Track = 0.254mm = same PictureX, which, btw. shows a PTH and not a NPTH.

?
Well, you could take that annular ring as a keep out, such as one would have for a screw head on a mounting hole, but that is beside the point.

But the point I was making is that even though they show the same pad and track in each picture, they each have a seperate set of dimensioning lines to show what dimension they are referencing, and if people don't understand the way each picture has been dimensioned, how can they understand something as basic as track to track spacing, or even track width.


 

Hi, Alan!

On 2/1/23 19:01, Alan Pearce via groups.io wrote:
Yeah, well, that is most likely a chat bot with no-one on the other end. That seems to be the case with those things as I understand it.
While they use identical pictograms they DO dimension correctly for the dimension they are providing, and if one can't follow the dimension lines ...
=> Definitely: No!

I don't know at which pictures you are looking at - or what browser you use.
I was referring (I called it PictureX) to exactly
in the section "Minimum clearance" on

Which is used at least three times: Via-to-Track, PTH-to-Track, NPTH-to-Track.

Same with:
This is used three times as well: Hole-to-Hole, Via-to-Via, Pad-to-Pad.

We seem to waste time here dissecting JLCPCBs Website... come on.

Greets,

Clemens


On 2/1/23 19:01, Alan Pearce via groups.io wrote:
Yeah, well, that is most likely a chat bot with no-one on the other end. That seems to be the case with those things as I understand it.
While they use identical pictograms they DO dimension correctly for the dimension they are providing, and if one can't follow the dimension lines ...
A difference between track-pad and track-track spacing will be normal to allow for soldering of pads. Even vias will require extra space for manufacturing tolerancing.
On Wed, 1 Feb 2023 at 16:44, Clemens Koller <cko@... <mailto:cko@...>> wrote:
Hi!
The <>
are IMO inconsistent in many aspects. Identical pictograms are used
for different values, indeed leading to confusion.
And I asked the staff directly via the online chat, why there is a
difference in between track-pad (PTH) spacing vs. track-track spacing.
The answer was "pls wait"; then "still checking" and then
"The chat has been closed due to long user inactivity."
-> good luck.
Greets,
Clemens


 

Hole to hole clearance(Different nets)
Via to Via clearance(Same nets)
Pad to Pad clearance(Pad with hole, Different nets)

Yes, these all have the same drawing, but they are different types of structures.? What bugs me is they are actually talking about the holes for the structures, but simply say "via" or "pad" rather than specifying the drill hole.? I chalk this up to language issues. What would you expect to see different in the three drawing??

I also don't appreciate that they leave as ambiguous whether the hole is the finished hole, or the drilled hole.? I would expect it to be the drilled hole for any sort of clearance, but who knows what they are doing if they don't tell you?

Why would "Via to Track" be different from "PTH to Track", but the same as "NPTH to Track"??

With the volume they produce, you would think they might put more effort into effective communication.

--

Rick Collins

? - Get 1,000 miles of free Supercharging
? - Tesla referral code -


 

Have you ever dealt with a Chinese factory directly? There is a reason why pcb brokers are still here. Sometimes, communicating with them is just bad. Even pcbway can't even get their specs straight when you ask about it. You say also that they are ambiguous on finished vs drilled....well how do you think they feel when customers do not know specify finished vs drilled?


On Fri, Feb 3, 2023, 11:51 AM Rick Collins <gnuarm.2007@...> wrote:
Hole to hole clearance(Different nets)
Via to Via clearance(Same nets)
Pad to Pad clearance(Pad with hole, Different nets)

Yes, these all have the same drawing, but they are different types of structures.? What bugs me is they are actually talking about the holes for the structures, but simply say "via" or "pad" rather than specifying the drill hole.? I chalk this up to language issues. What would you expect to see different in the three drawing??

I also don't appreciate that they leave as ambiguous whether the hole is the finished hole, or the drilled hole.? I would expect it to be the drilled hole for any sort of clearance, but who knows what they are doing if they don't tell you?

Why would "Via to Track" be different from "PTH to Track", but the same as "NPTH to Track"??

With the volume they produce, you would think they might put more effort into effective communication.

--

Rick Collins

? - Get 1,000 miles of free Supercharging
? - Tesla referral code -