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I think I eventually made progress on the previous issue... So in BH RN I have the following where the number of bits in `UInt` is parameterizable: data Tag a = Next ( UInt a) | Empty deriving ( Bits

Thanks for that code! I'm wondering how I can make it parametrizable... So far - no luck! import Vector ::*; // Required for Vector module mkTop #(parameter Integer bitWidth ) (Empty); // No default

Here's how I'd write it in BSV; I'd guess it's not too different in BH (would use the same mapM and genVector). Example run: ./exe_HW_bsim v_rgs [ 0] = 0 v_rgs [ 1] = 1 v_rgs [ 2] = 2 v_rgs [ 3]

I'm trying to figure out how to programmatically create a vector of registers in Bluespec Haskell initialized from 0..5. I think I should use mapM with mkReg next - but I'm not quite sure... Any help

NVM - I think I figured it out

I also like the idea. Always found such lists really useful in other languages/frameworks. Johannes

Would appreciate any pointers

I found some documentation on the completion buffer here: https://github.com/B-Lang-org/bsc/blob/main/doc/libraries_ref_guide/LibDoc/CompletionBuffer.tex But I haven't quite figured out a robust way

I like that idea a lot. There are a few popular AXI/AHB repos that I think people would like to know about when they first start using Bluespec. Michael [email protected]> wrote:

That's awesome, thank you. I would love for the BSC repo to have a list of links to all the useful code that's out there -- perhaps a new section of the README under "Community" can be a list of

Unwarranted!? My trepidation was totally unwarranted! Sigh.? Proofreading fail. -William

Is there an equivalent to mkNullCrossingWire for moving between reset domains?? I'm getting BSC warnings (G0043 and G0043) about combining reset domains but I believe I have the logic worked out such

I have written some helper modules for testbenches, depending on what you're doing they may also be helpful for you. 1) A "scoreboard" where you can put reference data as well as "dut" data. The

Also, do you by chance use the ECP5 FPGA with BH? I linked to some examples in my previous reply although they were basic. I'm going to see how BH fares when it comes to IO PHYs however. I have some

Glad to see BH syntax adoption in industry! I think BSV syntax is truly awful.. Trying to document BH here: https://bluespec.dev/chapter1/ Also, modeling RiscV with a Formal model before

Ha, thanks Charlie! He and I actually work for the same company (causing me to adopt the BH syntax), and I've certainly seen this library in our repo. I really like what it does, but have some

Hi Arjen, I spoke with folks that had been using StmtFSM in BH. They had written a wrapper library that provided abstracted functions for seq, par, for-loops, delays etc. They no longer have this

There are various ways to write testbenches, and it probably depends on the kind of design or interface. The BSC testsuite might be a source of examples -- sorry, I'm not sure which directories are

Is there any documentation / examples on how to write testbenches in BSV? I would like to have tests that run (maybe constrained) random inputs through my modules and then compares it to a reference

Ah thank you! I realize I missed the `do` to chain statements together. I'll experiment with this a bit and see what some helper functions can do.