Run the EPROM through a Z-80 disassembler?
-Chuck
Gala Dragos wrote:
> I've found out that A03W101 really go to nowhere. Following the circuits it goes
> to A04 board into some resistor which is not mounted. So I'm at a dead end. Any
> ideas ? --- On Fri, 3/15/13, Chuck Harris <
cfharris@...> wrote:
>
> From: Chuck Harris <
cfharris@...> Subject: Re: [TekScopes] Re:
>
Sony/Tektronix 318 - UPDATE To: "Gala Dragos" <
gala_dragos@...> Cc:
> "ArtekMedia" <
manuals@...> Date: Friday, March 15, 2013, 10:30 PM
>
> Hi Gala,
>
> I would give you a copy if I had one, but I only have the military manual that you
> already have.? I would suggest that you send an email to Dave Henderson at :
> ArtekMedia <
manuals@...>
>
> He has been known to send schematics to people in need.
>
> -Chuck Harris
>
> Gala Dragos wrote:
>> Not having the full schematics makes this a very difficult repair process !
>> After a very lengthy
probing session, in which I've managed to find a connection
>> from A03W102 to A02 and back, I decided to try and remove the last jumper wires
>> that differ between 318 and 338 instruments. Apart from A04W118 which is marked
>> as TYPE ID and sets the corresponding number of probes and possible the memory
>> size that is required to test at startup, there are two more jumper wires
>> A03W102 and A03W101. A03W102 is tied on A03 pin 23B and from what I could tell
>> is responsible for checking the presence of the A02 and possibly A01 boards (and
>> their types ?). W101 seems not to be connected anywhere, I could not find any
>> connection, but I could be mistaking as I don't have the full schematics. Now I
>> have unsoldered the jumpers one at a time and started the instrument with them
>> removed, below is what I've found. When W102 removed gives an error
in
>> diagnostics on the PRL section which states: "TIME BASE, WR, ACQ,NDL SEQ". When
>> W101 is removed nothing happens (as long as W102 is in its place). I somehow
>> find it hard too believe that Tektronix made a PCB with a ghost jumper that is
>> not used for anything. There must be something on the missing pages of the
>> schematic that can shade some light, there must be a loop somewhere ! Can anyone
>> provide the full schematics? Please. PS: both A03W101 and A03W102 are coming out
>> of A04U104 (pins 1 and 2) and are marked EDB6 and EDB7 respectively. --- On Fri,
>> 3/15/13, Gala Dragos <
gala_dragos@...> wrote:
>>
>> From: Gala Dragos <
gala_dragos@...>
Subject: Re: [TekScopes] Re:
>> Sony/Tektronix 318 manual with full schematic To:
TekScopes@...>> Date: Friday, March 15, 2013, 10:12 AM
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
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>>
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>>
>>
>>
>> At least page 4 of the tektronix 318 schematics, if not full ?
>>
>> --- On Thu, 3/14/13, Gala Dragos <
gala_dragos@...> wrote:
>>
>> From: Gala Dragos <
gala_dragos@...> Subject: Re: [TekScopes] Re:
>> Sony/Tektronix 318 manual with full schematic To: "TekScopes"
>> <
TekScopes@...> Date: Thursday, March 14, 2013, 9:09 PM
>>
>>
>>
>>
>>
>>
>>
>>
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>>
>>
>>
>> I'm missing part of A02 board form the schematics, it is necessary to follow two
>> signals that differ between 318 and 338. Can anybody provide the full schematic
>> of the 318 logic analyzer?
>>
>> --- On Wed, 3/13/13, Chuck Harris <
cfharris@...> wrote:
>>
>> From: Chuck Harris <
cfharris@...> Subject: Re: [TekScopes] Re:
>> Sony/Tektronix 318 manual with full schematic To: "Gala Dragos"
>> <
gala_dragos@...> Date: Wednesday, March 13, 2013, 10:25 PM
>>
>> Hi Gala,
>>
>> Sounds like you static zapped something.? ECL, LSTTL, and TTL are pretty
>> resistant to static, but not so any of the NMOS.? NMOS and CMOS chips from that
>> era were extremely sensitive to static electricity.
>>
>> Given that little tidbit of information, I would spend some time looking closer
>> to the CPU... particularly anything that could
prevent you from setting the 20ns
>> setting.? I don't remember how the 318 did that, but I recall it required a few
>> steps.
>>
>>
>> Gala Dragos wrote:
>>>>> Do you suppose that your 318 is doing something like that?
>>> Don't know, I don't own this for that long. The story starts in January, when
>>> I've realized I need a logic analyzer, so I managed to find one close by, well
>>> in the same continent and fiscal area that is (Europe). Got the instrument,
>>> but it came without the probes, which I have acquired from Jerry here on the
>>> forum. When the instrument arrived I have checked that the menu displays what
>>> it should, including the 20ns, and that it actually trigger on to something,
>>> which it did. During these tests I noticed that the
>> fan blows a lot of dust, it looked
like a diesel exhaust. So, naturally, I took
>> it apart and cleaned the thing. Put it back together and, to my surprise, no
>> 20ns clock was available.
>>> I need that 20ns clock up and running as I have some apps that run at 40+ Mhz
>>>
>>>>> That actually is a very good sign!Good, but what to do next? It is still
>>>>> unexplained.
>>> --- On Wed, 3/13/13, Chuck Harris <
cfharris@...> wrote:
>>>
>>> From: Chuck Harris <
cfharris@...> Subject: Re: [TekScopes] Re:
>>> Sony/Tektronix 318 manual with full schematic To:
TekScopes@...>>> Date: Wednesday, March 13, 2013, 9:26
>> PM
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>> Hi Gala,
>>>
>>>
>>>
>>> That actually is a very good sign!
>>>
>>>
>>>
>>> I have used some logic analyzers where the glitch memory reduced
>>>
>>> the storage speed by a bit... and others where the synchronous
>>>
>>> storage mode was
somewhat slower than the asynchronous storage
>>>
>>> mode.
>>>
>>>
>>>
>>> ... And, I have seen other units where there were lower priced
>>>
>>> siblings that were made specifically to use up the slow memory
>>>
>>> boards (that otherwise would have to be discarded).? It used to
>>>
>>> be a very common practice with minicomputers.
>>>
>>>
>>>
>>> Do you suppose
>> that your 318 is doing something like that?
>>>
>>>
>>>
>>> It's always better when it turns out to be operator error.
>>>
>>>
>>>
>>> -Chuck
>>>
>>>
>>>
>>> Gala Dragos wrote:
>>>
>>>> So situation is now like this:-
instrument type detection works, by adding
>>>> or
>>>
>>>> removing w118 from A04 board (acquisition)- the 20ns clock is still not
>>>> available
>>>
>>>> from the menu What the heck is going on? --- On Wed, 3/13/13, Gala Dragos
>>>
>>>> <
gala_dragos@...> wrote:
>>>
>>>>
>>>
>>>> From: Gala Dragos <
gala_dragos@...> Subject: Re: [TekScopes] Re:
>>>
>>>> Sony/Tektronix 318 manual with full schematic To:
TekScopes@...>>>>
Date:
>>>
>>>> Wednesday, March 13, 2013, 11:28
>>
AM
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>
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>>>>
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>>>>
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>>>>
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>>>>
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>>>>
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>>>>
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>>>>
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>>>>
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>>>>
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>>>>
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>>>>
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>>>>
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>>>>
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>>>>
>>>
>>>>
>>>
>>
>> Well that 20ns clock is missing in the diagnostics menu as well. TYPE ID is
>>>> only
>>>
>>>> tested at startup, I've just checked that by soldering a wire across W118
>>>> and
>>>
>>>> removing it (with a switch) when I entered
>> the trigger menu. When W118 is jumpered
>>>
>>>> at startup the instrument is a 338 until next startup (or MPU reset). The
>>>> 20ns
>>>
>>>> clock is no where to be seen no matter the if W118 is soldered or not.
>>>
>>>>
>>>
>>>> --- On Wed, 3/13/13, sbirdasn <
sbirdasn@...> wrote:
>>>
>>>>
>>>
>>>> From: sbirdasn <
sbirdasn@...> Subject: [TekScopes] Re: Sony/Tektronix
>>>> 318
>>>
>>>> manual with full schematic To:
TekScopes@... Date: Wednesday,
>>>> March
>>>
>>>> 13, 2013, 6:32
>>
AM
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>
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>>>>
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>>>>
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>>>>
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>>>>
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>>>>
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>>>>
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>>>>
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>>>>
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>>>>
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>>>>
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>>>>
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>>>>
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>>>>
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>>>>
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>>>>
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>>>>
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>>>>
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>>>>
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>>>>
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>>>>
>>>
>>
>>
>>>
>>>> Comments inline...
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>> --- In
TekScopes@..., Gala Dragos wrote:
>>>
>>>>
>>>
>>>>>
>>>
>>>>
>>>
>>>>> I have that manual, I cannot find half of
>> A02 board.
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>> You're right! page <4> is missing! The doc looked pretty good to me when I
>>>> first
>>>
>>>> looked at it.
;)
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>> That being said, my dead-tree version that is truly complete has the
>>>> following
>>>
>>>> circuits:
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>> 1) External clock input buffer with its threshold comparator/delay circuit.
>>>
>>>>
>>>
>>>> 2) Internal/external clock select logic.
>>>
>>>>
>>>
>>>> 3) Some buffers for qualifiers.
>>>
>>>>
>>>
>>>> 4) Threshold buffer amplifiers for the pods.
>>>
>>>>
>>>
>>>> 5) The signal routing to get one pod connector's
differential signals to
>>>> the
>>>
>>>> interconnect header for the
>> A01's differential to ECL signal w/ glitch detection
>>>
>>>> circuits. (one pod is handled on A01, one pod on A02)
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>> For the problems you're experiencing, it probably won't help much, if any.
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>> The full symptoms are these:- 20ns clock? disappeared;- there are 4
>>>>> selectable
>>>
>>>>> groups in the setup screen;- each group has 16 bits available for
>>>>> display;- only
>>>
>>>>> 2 pods can be selected for input (pod A and
pod B), the rest are
>>>>> unavailable;
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>> By that, I think you mean that groups 3 & 4 are disabled by default, and you
>>>> can
>>>
>>>> only enter signals A0-7 or B0-7 into groups.
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>
>> Correct?
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>> - all tests pass, including acq and sram;- the pods are capturing
>>>>> external
>>>
>>>>> signals properly (checked them with the available calibration
output);
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>> This would imply that upon power-up, it *does* ID itself as a 318.
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>> I have noticed that the instrument can be "used" without the?
>>>>> acquisition?
>>>
>>>>> board, albeit you can only browse the menus.
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>> Not surprising, since much of the hardware is write only or limited in how
>>>> the CPU
>>>
>>>> can interact with
it.
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>> Excerpt from the manual:? "The chip
>> select latch (A04U114) is used to enable
>>>
>>>>> each 8-bit pair of the acquisition memory and for identifying instrument
>>>>> type.
>>>
>>>>> It is written by the MPU with the WRITE BS signal from the A03 ACQ
>>>>> Control
>>>
>>>>> board."
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>> I have checked that circuit for continuity of traces and they are all ok.
>>>>> On the
>>>
>>>>> schematic there is a jumper wire called W118 which in the 338 is mounted
>>>>> and
in
>>>
>>>>> the 318 is not mounted, checked that as well and it is not mounted.
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>> Since you've checked the signal connections, it sounds like a hardware
>>>> failure in
>>>
>>>> one or more chips.
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>> Consider the following (I have no idea how they
>> wrote the firmware, so I have to
>>>
>>>> make some educated guesses):
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>> The Bank Select pin used for Type ID is "wire-OR'ed" with the ACQ/Glitch
>>>>
Memory
>>>
>>>> output data bus, which has pull-up/termination resistors to bring the bus to
>>>> a
>>>
>>>> known inactive state.
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>> Since the 318 has the jumper removed, then when the ID bank bit is driven
>>>> active,
>>>
>>>> the signal to be read *should* be in the "inactive" state.
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>> If one of the ACQ/Glitch SRAM's were to drive this pin to a "active" state,
>>>> then
>>>
>>>> the bit will be incorrectly read (there is also some status bits that are
>>>> selected
>>>
>>>> by the
2-1 muxes, so something could be wrong there
>> too).
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>> When would this happen?
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>> Apparently, not on power-up, as it knows to be a 318 for pod count and
>>>> memory to
>>>
>>>> test.
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>> But perhaps when you enter the Trigger menu and start moving the clock rate,
>>>> then
>>>
>>>> the firmware *might* check the hardware jumper state again, read the wrong
>>>
>>>> information, and prevent selecting the highest clock
rate.
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>> This is just a guess, but it would be easy to check-
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>> Solder a jumper wire onto the W118 pad on the latch side for probing with a
>>>> scope,
>>>
>>>> and check for
>> activity by the CPU to drive it active (to read the ID TYPE). The
>>>
>>>> signal will be fairly slow, as it is driven active across several
>>>> instructions,
>>>
>>>> and thus will be in the micro-second range, unlike the sampling circuitry.
>>>> Not an
>>>
>>>> ideal situation for signal integrity, but then I doubt you have a pair
of
>>>> extender
>>>
>>>> cards handy (made of unobtanium).
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>> I think the signals in this area are ECL, so the logic transition delta is
>>>> about
>>>
>>>> 0.8V between 1's and 0's, and does not go to either "ground" or V- (ECL is
>>>
>>>> technically a -5.2V logic family).
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>> Explore the operation of the analyzer, and note when the signal goes active.
>>>> Try
>>>
>>>> various menus, field changes, etc. to see when the
>> CPU fiddles with this signal.
>>>
>>>> You might also look at when
the Bank Select Latch is clocked too.
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>> You could check some other signals from the bank latch and the read side as
>>>> sanity
>>>
>>>> checks if necessary.
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>> I can't think of any other explanation as to why you can't select 20 nS
>>>> clock.
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>> Good luck.
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>
Sbirdasn.
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
>>>>
>>>
&
gt;>>>
>>>
>>>>
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>>>>
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>>>>
>>>
>>>>
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>>>>
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>>>>
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>>>>
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>>>>
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>>>>
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>>>>
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>>>>
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>>>>
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>>>
>>
br>>
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