Re: 7T11 Sequential/Random Problem
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Is this the kind of application where the differences between
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saturating (TTL) and non-saturating (ECL) logic would apply? I wonder if the extra jitter is from poor power supply rejection. On Fri, 20 Jan 2012 19:57:34 -0000, "Mike" <zuckerme@...> wrote:
BTW a 74LS14 with a resistor and mica capacitor provide a general-purpose 100 ns pretrigger delay. It seems stable to better than 20 ps rms if you happen upon a "good" inverter. |
David Hess