@ Arie de Muijnck
As bouncing is typically short (~ .5 ... 1 ms) following mechanical action we are talking about 100 pF...1 nF; under 5 V this means .5 to 5 nC which is very low.
If you read me well you'd have seen that my purpose is to parallel the resistances, not the switches.
Did you have a look at the mentionned schematic? The power induced by capacitors switching will be dissipated by the 74HC139. According to its datasheet formula (Note 1) estimated Pd will be 26 nW per coder step and per gate, worst case. Also very low.
Anyway the question is still: is there a solution to avoid or limit the value jumps?
Christian F1GWR