That sounds like a pretty classic failure mode of a dual FET. I had one in
a 7A22 do just the same thing. It worked fine, but there was an
uncorrectable offset which made the more sensitive ranges unusable.
I had good success replacing it with a matched pair of ordinary J113 FETs
stuck together under the little plastic hat that Tek put on the socket. All
I did was look up the circuit's DC operating conditions of the dual FET
(what Id for what Vgs - I think it was 1mA and -2.5V but don't quote me)
and find a couple of single FETs that met it. I used a quick test rig with
an op-amp to measure a dozen or so devices. Then I had to add gate
resistors for stability, but that might not be such a problem for an SC502
which probably has a wider bandwidth than the 7A22. Set up offset and gain,
check risetime and noise, job done.
Chris
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On Wed, 10 Mar 2021, 17:41 Martin, <musaeum@...> wrote:
Hi all,
What is curious is that I tested the FET on my curve tracer, and it looked
OK - both FETs display near identical curves (Id over Uds as well as Id
over Ugs) and the curves do look normal and very close to spec. The only
moment they differ is when I switch to "base open" on the tracer. The grid
voltage of the good FET starts to float a bit towards positive with very
high impedance, whereas the bad FET goes much more to positive and with
much lower impedance... clearly shot!
See the photos section, I added some screenshots there.
cheers
Martin
