Hi Nenad,
I agree that the avalanche pulse alone is probably so slow that the clipping lines simply act as a shortcut.
But how to explain the response to the Offset control? When you change Offset then this change is balanced by an opposite change in Memory voltage in order the maintain the same voltage at feedback pins 2 & B of the S-4 connector. When the S-4 does nothing then that feedback voltage would change freely and Memory would not change at all. What is wrong in this reasoning?
Albert
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On Sat, Apr 20, 2019 at 11:12 PM, Nenad Filipovic wrote:
Hi Albert,
In my case (without the snap-off signal) the head sensitivity to input
signal was zero. The explanation is in the structure of the strip line to
which C52 and C54 are attached. This structure has (intentionally) a very
low inductance, making it a very high frequency tuned circuit with respect
to its own capacitance (these parameters guarantee the specified high rise
time of the gate strobe signal, which is the key parameter of S-4 design).
Slow dv/dt signal off Q69 could never produce a large enough voltage on it
to forward bias the gate diodes. However given the ratio of C52/C63 and
C54/C64 dividers, Q69 can reverse bias the snap-off diode D61. Reverse
recovery process of D61 yields the high dv/dt (high harmonic content)
snap-off pulse, to which the strip line resonator will now happily react.
R50 fine tunes the Q factor of this circuit (its transient response).
Therefore without the fast snap-off pulses, input gate diodes will never
conduct.
What kept being confusing during my troubleshooting was the presence of
sampling pulses in the signal path (all the way to vertical output). At
first I could not tell whether these were coming from the input gate (which
would imply a working snap-off), or somewhere else. Later I determined that
these are present in the complete memory-vertical amp-feedback loop,
leaving no guarantee that the gate is sampling at all. Being sure that gate
is functional (my previous tests) I focused on the snap-off, and that's how
I found the issue. I was very lucky, I have no extension cables for S-4,
and snap-off board is completely inaccessible when S-4 is inserted in 7S12.
Best Regards, Nenad
On Sat, Apr 20, 2019 at 10:07 PM Albert Otten <aodiversen@...>
wrote:
Hi Nenad, I overlooked your second last message in which you answered my
question about DC response and more. I have to admit that I fail to
understand what is exactly going on when R62 is interrupted.
Is there someone else with an explanation?
Albert
