On 22 Jan 2014 18:57:42 -0800, you wrote:
Hi all:
I have a waveform (5 V logic) driving a 16 x 2 LCD from a PIC Mcu. 3 of the data lines switch to become analog ADC inputs between sequential LCD character refreshes. The ADC sampling happens around every 1 msec.
The adc is reading a voltage divider formed by a 47K NTC thermistor and a 39K pullup (5v). I am getting a discrepancy in that the voltages (2465A trace) are reading 1.3V higher than they should be. Increasing the adc presample settling time from 10uSec to 50uSec makes no diff. I was suspecting that the prior adc sample is causing the adc capacitor to 'holdover' charge from the old hi sample of another pins analog input signal. I ordered 4.7k thermistors to try a much lower impedance volt. divider solution. I have to be careful not to 'load' the PIC pin output too much by the thermistor 'pull down' or the LCD display will fail.
Capacitive ADCs often have problems with high impedance inputs and those
integrated into microcontrollers often have problems with digital switching
noise. In real applications the accuracy specifications tend to be grossly
optimistic without a lot of careful design work.
Did attaching the oscilloscope probe to the pin affect the ADC reading?
It might be worth adding decoupling capacitors to the ADC input and reference.
On the input it would need to be small of course to not slow or load the digital
output. Settling time requirements may make this impractical.
Anyway, isolating the .5V to 4.5V ranged 10uSec adc voltage divider sample is tricky as it is inside the 5V logic pulse train of the LCD inputs (far larger logic switching periods) .I can't trigger on the adc sample pulse level and it skips around the CRT making it hard to measure.
I might try letting the trigger free run and just look at the vertical
histogram. Normally that would show the low and high logic levels as well as
any settling in between them but in your case the time spent using the pin as an
analog input is so short compared to the time spent as a digital output that the
analog signal level in the histogram will be dim.
Is there a way to have the 2465a trigger on complete short pulses rather than pulse edges?
This might be possible to do with a lot of trouble to design a custom trigger
circuit but even if it worked, the leading edge would be missed.
Worst case is I could configure another PIC pin to act as a Ch3/4 temporary trigger when the ADC sample is to be taken. But all the pins are committed right now although the RS232 Tx isn't actively running atm and could be re-purposed for the debug.
This is the best way and is usually what I try to arrange first. A serial port
of one type or another doing double duty is ideal for this.
David Hess