开云体育

ctrl + shift + ? for shortcuts
© 2025 开云体育
  1. QRPLabs
  2. Topics

Thinking about a project, receiver module + VFO / sig gen

 

I'm interested in doing some SDR tinkering, using the receiver module kit and the VFO kit.? The LO input on the receiver module is divided down by 4 to make the quadrature clocks for the Tayloe mixer.? Could I, alternatively, program CLK0 and CLK1 on the Si5351A to make the quadrature clocks, disconnect the 2-bit counter, and route the two clock signals directly to the multiplexer chip?? Might that enable me to increase the bandwidth of the receiver, assuming I create an appropriate bandpass filter to go ahead of the multiplexer?
?
Thanks,
Eric
 

i haven’t done it, but that is exactly on my to-do list in my shack projects list.?
--
Paul Roberts, G0OER?
 

On 18/09/2024 19:13, Eric Hansen, KB1VUN via groups.io wrote:
I'm interested in doing some SDR tinkering, using the receiver module kit and the VFO kit.? The LO input on the receiver module is divided down by 4 to make the quadrature clocks for the Tayloe mixer.? Could I, alternatively, program CLK0 and CLK1 on the Si5351A to make the quadrature clocks, disconnect the 2-bit counter, and route the two clock signals directly to the multiplexer chip?? Might that enable me to increase the bandwidth of the receiver, assuming I create an appropriate bandpass filter to go ahead of the multiplexer?
Eric,

Bandwidth? You mean tuning range?
The divide by 4 is easier as it is there. It will give you a lower minimum than using the 2 outputs unless you can enable a quadrature output below 3.5MHz. .
Maximum will be around 50MHz+.

Several BPFs would be needed for the whole range.

73 Alan G4ZFQ
 

Yes, I meant tuning range, sorry.
?
A little more background.? Fifteen years ago I built a 40m SSB receiver from a Softrock, analog I/O, and DSP written in VHDL on a Spartan-3 FPGA.? That was my introduction to SDR.? What I'd like to do now is approach the problem again, starting with the QRP labs modules and designing the DSP in C on a microcontroller. Reinventing the wheel, sure, but the fun is in the experimentation.
?
As a bonus, I though it might be fun to see if I could make a VHF (FM broadcast, NOAA, 2m ham) receiver.? That's the reason for asking about the wider tuning range.
?
Thanks,
Eric
 

On 19/09/2024 21:01, Eric Hansen, KB1VUN via groups.io wrote:
As a bonus, I though it might be fun to see if I could make a VHF (FM broadcast, NOAA, 2m ham) receiver.? That's the reason for asking about the wider tuning range.
Eric,

I certainly can't help with coding:-)

The Softrock/QRP Labs RXs are limited by the hardware which, I think, will not go much above 60-70MHz.
So to use them at VHF you would need a mixer or tuner chip in front.
An example here

73 Alan G4ZFQ
 

Thanks for the reference, Alan!
?
Eric
 

Hi Eric,

I’ve been having similar thoughts and have been doing FPGA design since 1997. I have an Artix 7 dev board (Digilent Nexys Video) and a Zynq Ultrascale board (Avnet Zuboard) that I’m using for home projects I’m working on. I know both VHDL and Verilog (my preference) and could certainly help with coding and system design. I’m use AMD Vivado exclusively these days and neither of the boards requires a license. I’ve had success clocking both boards above 300 MHz.

Ping me at my QRZ email if you’d like to discuss further.

Tony AC9QY


On Fri, Sep 20, 2024 at 9:11?AM Eric Hansen, KB1VUN via <kb1vun=[email protected]> wrote:
Thanks for the reference, Alan!
?
Eric

1 - 7 of 7