Randy, something is strange. Early you wrote VDD is produced by the linear regulator. LIN_REG_EN must show some volts to connect IC101 to "+12V" via Q102. Your schematic shows 0V at LIN_REG_EN. Appropriate Diagnostics show the status SMPS. This should switch off IC101. So there maybe a (helpful) failure.
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LIN_REG_EN at 0V would also switch off Q110 and R114. R114 is an artificial load to operate the SMPS without a real load. It's hard to adjust a SMPS with (nearly) no load. Maybe this is the reason for the to high voltage at D of Q109.
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A not well working Q113 may cause a similar effect. Please check the oscillogram at B of Q113. It should show rectangle from around 0V up to "+12V". The voltage at E of Q113 should follow but with around 0.7V at low and "+12V"-0.5V at high.
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73 Ludwig
