On Tue, Aug 29, 2023 at 02:24 PM, Jonathan Burchmore wrote:
I did a poor job of stating my question. ?I agree with your assessment of the voltage regulator output. ?My question was about the LIN_REG_EN signal. ?If you look at the trace below, channel 2 is LIN_REG_EN as measured on the 3v3 board connector, i.e. downstream of R101 and Q101. ?It is initially around 7.5V, then drops to 3.3V, then to 0 when the SMPS comes online. ?I'm trying to understand the mechanism that pulls LIN_REG_EN FROM ~7.5V to 3.3V. ?Or for that matter why it is initially at 7.5V instead of the supply voltage of 9V.
Secondly, since I was measuring the voltage right at the connector, it seems that the processor pin would also have been exposed........
Jonathan,
What you are seeing is the V_IN level when you first push ON or turn ON the Power Supply. This is goes through R101 to the gate of Q101 and LIN_REG_EN. You definitely exceed the 1.7V nominal Gate Threshold of Q101 and it turns on powering up the 78M33. After about 80ms of 3.3V the processor is initialized and comes alive. The processor now drives LIN_REG_EN ....
.also....with it's own 3.3V supply (probably has an internal pull-up to its 3.3V). This 3.3V LIN_REG_EN also exceeds the Gate Threshold of Q101 which keeps it ON and keeps the 78M33 going. When the processor decides it's time to enable the SMPS it drops LIN_REG_EN to 0V (or at least <<0.8V ......the Gate threshold voltage of Q101 is not met and it turns OFF turning OFF the 78M33 and turning ON the SMPS.
LIN_REG_EN has to
STAY at that 0V level to keep the 78M33 turned OFF.?
I don't know where the 7.5V you mentioned came from. I also don't know how happy pin PD7 was about being connected to 12V or 9V and then being initialized.
73 Kees K5BCQ
