The N-Channel FET Q101 will conduct ON if the Gate Threshold voltage is nominally 1.7V. That is with +12V, +9V, or +7.5V feeding the 78M33 regulator. This in turn causes Q102 to conduct and the 78M33 comes alive. This will also?happen if LIN_REG_EN is at the Q101 Gate Threshold voltage? .....a voltage that must be supplied by pin PD7 of the processor after it's been powered up with 3.3V and initialized. I don't know how happy PD7 is with a pull-up to 12V but at least the current is limited by R101. By definition this happens later and it looks like about t=80ms after pushing the ON button. So it looks like LIN_REG_EN from PD7 of the processor just keeps the 78M33 regulator ON until t=250ms causes the switch over to the SMPS. Since PD7 can now control LIN_REG-EN the processor controls the switch timing to the SMPS. I assume PD7 has it's own internal pullup to 3.3V ? ....or is Open Collector
One thing that you want to make sure of is that LIN_REG_EN actually goes below the Gate Threshold of Q101 or <<0.8V or it won't turn OFF.?No "floating" levels allowed, they drift. You won't see the result because the STMP 3.3V is slightly higher than the 78M33 3.3V and D103 is back biased.....but it can still supply current through the "dot OR".?
73 Kees K5BCQ
