Allen,

It may not bee needed to have an external USB audio. I also tried with 16bit 192kHz regular PC audio line and it also worked.

--
Ion
VA3NOI

开云体育

Allen, thanks for the excellent document!

Yes, I know the output phase is OK as the OCXO and the ADF4351 are slightly out of tune (200Hz) as can bee seen in the ARTA picture. This allows me to see both the signal and the phase noise but of course creates dynamic range problems.
My concern is that I also did measure the phase noise in-situ in the spectrum analyzer build with two of the ADF4351 modules and that resulted in a somewhat different picture (apart form the fact this measurement is done at 2.6GHz so DIV1
In-situ phase noise measurement
Another concern is that compared to the data sheet I seem to have a noise level at least 10dB higher from what is stated? in the data sheet.

I'm using a 10MHz reference clock from the onboard xco. All settings can be seen in the screen grab of th ADF4351 tool in my first post. I tried with the doubler but that did not make a big difference. I also used the OCXO as reference as it has much better close in phase noise (below 1kHz) but no difference in noise above 10kHz
The ADF4351 module is the "green" ebay module. I also tested the black ebay module with 25 MHz onboard XCO reference, it has more spurs but comparable phase noise.
All modules have an ultra low ESR capacitor on the 3.3 regulator output

Till now I always measured phase noise by using multiple ADF4351 modules. To understand the impact of loop current and loop filter changes it would be better if it would be possible to measure the phase noise of a single? ADF4351 module. The maximum XCO I have is at 10MHz. Because of the output divider in the ADF4351 the lowest multiple at 50MHz (DIV64) has too low phase noise to measure as can be seen in the datasheet



Instead I went for a setup at 430 MHz using a divider of 8 (DIV8) resulting in 20dB more phase noise:



The 43nd harmonic of the 10MHz signal is filtered out and amplified and send as LO signal to as passive DBD mixer. The output of the mixer goes to a PC using a good microphone input.
Without the LO signal connected to the mixer, ARTA show the noise floor of the microphone input.



Good enough for this measurement.
With the LO connected the noise floor goes up which will limit the noise measurement possibilities




With the ADF4351 connected and using these settings:



I get the following measurement in ARTA using a 65536 bin FFT with FS at 192kHz (3 Hz per bin) so the measurement is 5dB above a /Hz measurement. Output signal of the ADF4351 is at +5dB but the noise is measured relative to the main output signal.



The 0dB peak at 200Hz can be moved around (even to 0 Hz) by tuning the OCXO. Phase noise at 10kHz seems to be at -100dB (compensating -5dB for the 3Hz FFT bins) which is about consistent with a simulation using ADIsimPLL using a loop filter of 15kHz



The phase noise however extends to much higher frequencies before it starts to decrease. Decreasing the charge pump current substantially leads to a noise increase at 10kHz as can be seen below



This looks more like the loop filter has a 60kHz bandwidth but according to ADIsimPLL the 10kHz noise should be 10dB lower with a 60kHz loop filter
So now my questions before I start to exchange loop filter 0603 SMD components or low noise 3.3V regulators:
- Is this an appropriate method for measuring the phase noise of a single ADF4351 using only simple equipment?
- How to improve the measurement?
- Is the loop filter bandwidth?60kHz or is it 10kHz and is something else pushing the 60kHz noise up such as a noisy regulator?

When comparing with the Phase noise scan of the famous "Scotty's spectrum analyzer with a first IF at 1GHz" I notice it is very similar



Due to the level 13 mixer and the higher first IF leading to less LO->IF isolation I measure 20dB more zero Hz signal in my SA
Taking that into account the picture seems surprisingly similar.
Marker 5 (100kHz) in my SA is also at -100dB (when compensating for 20dB more signal)
Marker 2 (3kHz) in my SA is also at -80dB (when compensating for 20dB more signal)
Or am I making a mistake?

I wish it where kHz.
The scan is from 0.001MHz till 10MHz with center at 0.1MHz (is mentioned at the top of the scan.)
I have no clue how I ever can improve phase noise with a factor 1000

--

Using the FFT mode with its much small resolution filters and 10k points it became possible to see the PLL shoulder



This was made with the first IF at 2.6GHz. Phase noise has somewhat improved due to a better power supply
At the left you see the resolution filter from 1kHz till about 3kHz, the PLL shoulder is at -60dB and extends till 30kHz.
Above that you see a linear drop (actually logarithmic) till below -90dB at 300kHz. Did not check yet if the angle? corresponds with ADIPLLsym output
The resolution is now good enough to see small changes in the PLL setting such as changing the loop current or setting R to a different value
Also the 10MHz XCO on the green ADF4351 modules is not the most stable and testing with a very stable external 10MHz TCXO may now have a visible impact. The more you see, the more can be improved, so much fun!

After some more testing some good and some bad news.
The SA with audio FFT dynamic range is over 110dB with an effective IIP3 above 20dB.
The problem in the signal path was a mistake in calculating the FFT bucket width.
But the major problem emerging is the phase noise of the ADF4351. Due to the high first IF at 2.6GHz it starts at -60dB so the ability to see a weak signal close to a strong signal is very limited.
Next step is back to the ADF4351

While trying to do some analysis of narrow band signals it became obvious the current design of the spectrum analyzer has two limitations.
Below picture shows both of them.

The signal to analyze is at 575kHz.?The resolution filter is clearly too wide, about 30kHz at -3dB, and the staircase patter shows scanning is done in 10kHz steps caused by the minimum frequency steps of the first mixer LO, a ADF4351. Making very narrow RBW filters is a considerable effort and an FFT could be an alternative.
So it was time to go test if a mixed mode SA can work. At high spans the SA works with the log detector but as soon as the minimum frequency step is below 10kHz the log detector is no longer used. Instead a third mixer is used? to convert to an IF of 50kHz. This is fed into the PC line-in of a good audio card at 192kHz sampling rate and analyzed using a 1024 point FFT. As the usable buckets of the FFT are limited due to the RBW, now acting as the 3 IF filter, multiple FFT's, spaced 10kHz apart, are stitched together. The FFT bucket width is about 100Hz, About 300 times better compared to the RBW filter used above,
The result is a nice sharp signal due to the flattop window function applied. The scan is 1000 points wide. Measurement speed is considerably faster as instead of 1000 steps the ADF4351 has to step only 10 times. It takes about twice the time for the audio samples to be collected compared to the stabilization of the log detector so in total still 50 times faster



There are still many thing to improve or test such as:
- The dynamic range of the audio input should be in the order of 110dB (24 bit audio card). This needs to be validated together with the behavior of the third mixer
- The frequency calibration and peak labeling needs to be improved for this much higher resolution.
- The noise floor shows a repetitive pattern so something is still wrong in the signal path
- Instead of averaging or duplication of FFT buckets to match the required resolution a better approach is probably to have an adaptive FFT length. A 10k FFT will result in 10Hz RBW resolution (and run 10 times slower) and a 128 bin FFT (for 1kHz resolution) will be much faster
So many things to try!

One member of this group suggested to use the SPF5189Z as IF implifier. With its low noise and high 1dBCp and IIP3 one would expect a clear performance improvement.
I configured the SA with two mixers with 1st IF at 2600MHz and second IF at 10.7MHz. The SPF5189Z delivers +25dB and is placed after the diplexer after the second mixer before the resolution filter.
All mixers where? replaced by level 13 mixers and I use amplifiers to increase the 5dB from the ADF4351 LO's to 15dB which is more then enough.
All amplification before and between the mixers is removed to get maximum IIP3



This resulted in a noise floor at -95dB with 300kHz resolution filter and an IIP3 of +17dB giving a spur free dynamic range of about 75dB. As long as the input signals are below -20dB there should be no spurs.

Time for some real measurements. I forgot to disable the IIP3 measurement so do ignore the "Left IIP3......"? text at the top of the chart. Also the resolution filter is still on manual control and set to 300kHz
First a black eBay ADF4351 module configured with R=1 and 10kHz channel spacing sending 445MHz locked to a 25MHz reference through a -20dB attenuator.



The spurs spaced 25MHz apart, both starting at 25MHz and around 445MHz, are clearly visible. Increasing the R to 4 delivers a better picture.



The spurs are clearly reduced although not entirely gone.
Now with the green eBay ADF4351 module and R=1, keep in mind the green module uses a reference of 10MHz



This is an even cleaner picture. Also notice the 5dB increase in signal due to the better component choice on the green module

Lets see if a SI5351 gives a nice clean signal?
Setting the SI5351 to 35MHz and using again a -20dB attenuator gives a rather busy screen.



Increasing the attenuation does not make any difference.
The way the SI5351 works if of course different from the ADF4351. In this particular application I was very lazy and wanted a fast sweep so I keep the VCO fixed at 800MHz and use a fractional divider to generate the required frequency. Not the best way to do as can be clearly seen.
A green ADF4351 module set to 35MHz delivers a much cleaner picture. Notice the almost absence of second harmonics suggesting the output drivers are doing well.



I'm very happy with the measurement possibilities. There are still several improvements to make.

• Add 11dB amplification and a 3dB? attenuator after the first mixer to lower the noise floor while keeping input levels of both mixers and maintain IIP3.?

• Use ultra low noise regulators for the Vvco on the green modules. I already added ultra low ESR capacitors to the 3.3V rail and that already improved phase noise.?
• Add shielding and put everything in nice box. The latter will be the most difficult.

Using an Arduino zero, two ADF4351 eBay modules, a 3000MHz eBay bridge and a triple receiver using the Simple VNA hardware (see file area) I was able to measure complex impedance's and tune filters till above 2.6GHz. It seems the eBay bridge stops working at around 2.8GHz. With a better bridge it should be possible to go till 4.3GHz?
The whole VNA looks like this (no shielding yet)


At the top the Zero
Below two black eBay ADF4351 modules sharing a XCO
Middle left is the green eBay 0.1-3000MHz bridge.
The middle right module is the triple receiver, each identical and consisting of a 14dB attenuator and an IAM81008?
The selection of transmission / reflections is for now with the big blue switch but this can be done with the Zero and some FET's
The grey cable takes the audio output of two IAM81008 into the PC line input.
At the bottom a DUT in the form of a 433MHz IF filter
Building the receivers on bare copper using some teflon tape to isolate components proved to be fairly simple. SMD components are mostly big 0805

I tried. Maximum bandwidth ratio is less then 2. Would have been nice if a ratio of 3 would have been possible. as that would eliminate one resolution filter step
I am aiming for 300kHz, 100kHz, 30kHz and 10kHz, lower are, at least my current thinking, better done using one more mixer down to an IF at 40kHz going to the line in of the PC and using an FFT.

Adding a third filter stage and tuning for minimum loss created a somewhat wider but certainly steeper filter. I can not get rid of the pass band ripple but have not yet tuned the impedance matching capacitors and the input/output impedance is still a bit too high.