On Sat, Mar 30, 2019 at 07:35 AM, Thomas S. Knutsen wrote:
Have you measured the amplitude of the Reference oscillator that
drives the PLL? often increasing this can help the spurs.
Yes, full 3.3V swing
As for the PN, a initial test is probably to isolate the different
sections from each other with large inductors and capacitors. Adding
low noise regulators instead of the one on the board would not do
much, you will need to separate the voltages to match the dev board to
get optimal preformance.
I intend to isolate voltages AND add a low noise regulator for Vvco only
If you think you are up to it, I can sketch a schematic for a suitable
testset for measuring PN with a soundcard. A DBM, a low noise audio
amplifier, and a good soundcard does the work. It won't be as easy as
one of the commercial analyzers, but you can get information on your
oscillators.
Yes please!
Having a couple OCXOs on VHF or such that have known good
PN helps, in that you can determine the limits for your measurement.
I have one at 10MHz. Would that be sufficient?
