I can't see anything that tells me what the maximum input is before the device is destroyed.
Inputs appreciably outside power supply limits will be problematic.
ESD was most problematic for CMOS not internally protected.
50 Ohm bridge pretty much protects the active chips;
bridge resistors can of course be damaged
by exceeding power dissipation rating (V*V/R)
Wouldn't a diode introduce capacitance across Ch0 ?
Or inductive lead effects at VHF/UHF and ruin any measurements ?
Having variable amounts of built-in parasitic reactances,
each nanoVNA already needs "calibration".
Oristo