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Re: Does anyone know how sensitive the nanovna is to electrostatic discharge?


 

On 8/24/20 12:49 PM, aecradio1@... wrote:
From the info from NXP, neither the SA602AD or the SA612AD indicate a max. input signal into either port.
Max Vcc is 9 Volts though
They list TOIP, but not a maximum input signal level, or frequency.
Getting to the ESD question - it's a bipolar part, not CMOS, so there's no delicate gate oxide to punch through. It's physically small, so there's a "energy deposition" issue.

There's a 1.5k resistor to ground from the two RF inputs (IN_A and IN_B pins - you'd not want to burn that up, of course. But, say, 10 V peak would only be flowing 6-7 mA..

I'd guess comparable to something like a 2n3904 BJT in sensitivity

The 3rd order intercept of -13 dBm implies it's not looking to see big signals on the RF ports. (i.e. -45 dBm) appears to be the test condition. Figure 13 shows it starting to compress around -30 dBm.

LO drive? That's the OSC_B pin, and they don't say much about it: "the external signal can be injected at OSC_B (pin 6) through a DC blocking capacitor. External LO should be 200 mV (peak-to-peak) minimum
up to 300 mV (peak-to-peak) maximum.

250mV peak to peak is about 90mV rms. It's not a 50 ohm load, but if it were, it would be about +8 dBm.

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