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Re: Ceramic filter measurement


 

I have a few Model 18s and a Model 19 receiver. The Model 19 schematic is
attached; note no transformers. What do you make of it?

The 18 has a BJT input stage vs. the 19's JFET, and the 18 has no AGC for its
passive front end.
Oh, that's a beauty! Individual IF filters tunable inductors and caps - five adjustments per section, each. That really is something.

I wouldn't personally want to try fiddling with those filters without a _lot_ of careful thinking up front... the alignment procedure is probably a whole cave-full of hungry bears. Mark the starting positions carefully!!!

The good news is, this is going to be pretty easy to drive and measure, I think, as long as you look at the whole IF strip as a unit, because you're not actually driving any of the filters directly. The input side of each filter bank is driven from its own transistor amp and isolated from whatever you might do outside, and all but the last of the filter bank outputs is also isolated from the outside.

Take a look at the "IF input from front end". This has a very high input impedance... 470 kOhms, in parallel with the input impedance of the Q301 JFET (which will be extremely high at DC, and somewhat capacitive at 10.7 MHz). The L332 input inductor (between the jack and the gate of the JFET) might be there to cancel out the capacitive reactance... I haven't crunched the numbers to see.

Anyhow, I suspect that the best way to drive this input is to use a simple three-way T connector - NanoVNA drive port on one leg, the tuner's IF input connected to the other, and a good 50-ohm resistor connected to the third to terminate the drive signal. This will give you a high S11 return loss, and provide plenty of signal to drive the JFET. You _might_ need to pad down the NanoVNA drive signal to keep from overloading the JFET and saturating the whole IF chain.

On the output side... well, this may be a bit trickier. R317 (coming out of the last filter) is 2.7k, so the filter won't see less than that. When I look at the next stage of the schematic (the limiter assembly) I see this signal driving right into the base of a BJT, whose emitter is AC-bypassed to ground... so, the input impedance of the limiter is going to be quite low (a few tens of ohms at a guess - I'd have to evaluate the limiter schematic and figure out what sort of current they're running through its first transistor). So, odds are, you could just run this output into the 50-ohm input of a NanoVNA's second port, and the impedance would be OK.

A safety "gotcha" here, though... this IF strip has some gain in it due to the input and interstage-buffer transistors! The signal coming out of the output will probably be larger than the signal going in - I'm not sure how much. You don't want to risk overloading the bridge and mixer in your NanoVNA's second port. It would probably be wise to stick something like a 20 dB 50-ohm attenuator pad between the IF strip output and the NanoVNA input at first... do a sweep and see what your peak gain is. Then, consider reducing the amount of padding until you're close to a 0 dB insertion loss.

Fortunately there isn't any DC imposed on either the input or output of this IF strip (according to the schematic) so you don't need to worry about that... I don't think any of the +/-12 can get through to the analyzer in either direction...

... unless you've got a fault on the board. Wouldn't hurt to isolate both the input and the output from the NanoVNA with .1 uF caps, just to be safe.

This receiver really is a beautiful example of a fully-discrete transistor design from its era.

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