Hi all,


Thanks for KiCad 8


I have two questions regarding KiCad 8.0

1.
I have an LCD on my pcb, and have a large courtyard for it. Under my LCD, there are lot of other components. When I run the DRC tool, I get many false courtyard overlap errors. Is there any way to squelch these? They might shadow real errors.

2.
I see a migrate library button. How does it work? If I push it, it says I shall select libraries. If I select them, it says the same error message.



Thanks,
Lev


--
Levente Kovacs
Senior Electronic Engineer

W:

开云体育

I am trying to simulate a simple transformer in KiCad 8.0.0 release build. I attach the project files for reference. I am using the 'coupled inductor' model with a .SUBCKT but I do not see the expected results in simulation when driving one inductor with a sinusoid. Would greatly appreciate any advice or pointing out any errors in the way I've implemented this.

The problem is your transformer subckt:

.SUBCKT BasicTransformer 1 2 3 4
L1 1 2 10m
L2 2 3 100m ---------> should be L2 3 4 100m
K12 L1 L2 0.99
.ENDS BasicTransformer

The secondary was not connected.

--
Regards,
Tony

Hello,
I am trying to simulate a simple transformer in KiCad 8.0.0 release build. I attach the project files for reference. I am using the 'coupled inductor' model with a .SUBCKT but I do not see the expected results in simulation when driving one inductor with a sinusoid. Would greatly appreciate any advice or pointing out any errors in the way I've implemented this.
Thank you.

The project changed as various engineers reported concerns, both potential
and actual. Instead of one huge board there are now four relatively small
boards, two at the top and two at the bottom. Top-to-bottom comms is a
logical extension of the CAN bus, whilst the I2C bus will run the width of
each board, a distance that doesn't give me any cause for concern, either
in terms of signal length or physical length. So thank you for your
suggestions, but to my relief the potential problem has gone away.

The project is a larger version of a product that has already been built,
and that did use one large board that took the I2C over a significant
length. I used 0.4 mm track width, and all was OK, though being a
demonstrator it hasn't been through environmental testing. So maybe the
roasting is yet to come, both for the board and for myself :)

I wouldn't want to run SPI over anything other than a short distance, as
that would be begging for trouble IMHO. I have in the past run I2C over
many metres of cable with no special drivers (just carefully designed
filtering), but it was only low speed.

Regards,

Robert.

On 1/12/24 07:00, Alan Pearce via groups.io wrote:

Yeah, but if you have a 'transmission line' you would avoid needing to
vary the track width or doing other things to create impedance bumps.
And using I2C to go 40-50 feet is taking it way beyond what it was
designed for. Going those sort of distances one uses other techniques,
or runs the I2C much slower.

I should also mention an extremely fast setup called SPI which is totally dependent of the slew of rise and falls of the signals, to make it work, typicaly src terminated as in the case of the connection between an rpi4b's gpio pins, and a mesa 7i90HD interface card that runs my biggest lathe, an 85 yo Sheldon 11x54. Exchanging 32 bit packets of data over a 3 wire buss, typically a piece of std ribbon cable. That stuff has a typical impedance of 122 ohms. And it runs at the clock speeds of the system so the pi transmits at 42.66 megabaud, and the mesa card answers at 25 megabaud. The way I did it was to turn the pi upside down which made the ribbon cable just over an inch long. I first had a pi3b in there, but when the faster rpi4b came out swapped the card, keeping the sd card. I don't believe it has made a mistake in 8 years.

It may be a transmission line, but its very short, I've heard rumors it still works with a 1 foot cable. Using std 6" jumper wires didn't work unless I put a 10 pf cap on one of the gpio pins to slow the rise and fall times, discovered when I put a scope probe on the line and that made it work. That was far enough back up the log it was an analog scope, the usual dual trace 100 mhz Hitachi. I bought the digital storage version when it came out, then bought Siglents best a couple years ago, a 4 colored trace 350 mhz model. You can look at the ringing of a signal edge and see the clipping of the negative overshoot being squared off by the conduction of the isolation substrait diode in the ic's input at a -.6 volt level. I had read about it, but that is the first time I'd actually seen it. Actual conduction time was about 1.3 nanoseconds. You'd be amazed at what you can see with a fast enough scope.

Take care guy.

On Fri, 12 Jan 2024 at 00:12, Gene Heskett <gheskett@...> wrote:

On 1/11/24 13:52, Alan Pearce via groups.io wrote:

I wouldn't have thought you would need to treat I2C lines as
transmission lines, the data rate is quite slow (even at high speed
I2C you are still only at 4MHz). It is not as though you are laying
out a memory array where a heap of parallel address and data lines
need to be synchronised to a double data rate clock, and so edge
timings are highly critical. The I2C transfer clocking is designed to
deal with a small amount of ringing on the clock and data lines.
Considering it was originally designed to be run in a wire harness in
a TV set, it should be quite robust.

But as to track width on a PCB, as you are not constrained by
requiring impedance controlled tracks, make them wide enough that they
will be robust in manufacturing of the PCB (i.e. don't create
under-etching problems, corner peel problems, etc) so that the PCB
house minimises rejection rates, and then during assembly &
integration the tracks are robust enough to withstand knocks and rough
handling without causing micro-cracks in the tracks. Personally I
would go for something like 0.5mm, only thinning when needed to
squeeze through gaps between pins and pads.

And every time you do that, there's a huge bump in the impedance at that
point. If you don't have a T.D.R., make it or get one. I've made one a
few times, and made it work well enough to tell a tower crew looking for
a burnout in a transmission line which joint to take apart to find the
top or bottom of a line fire. Saves at least a day getting the fire
damage repaired and the tv station back on the air.

I2c is the most ticklish transmission they ever threw at us, designed to
work at ttl voltage levels, the drivers have so little surplus power
that it can't be properly terminated to make it a real transmission
line. That limits it to under 40 feet. src terminated, maybe 50 feet.
With more modern fasrer circuitry.

On Thu, 11 Jan 2024 at 16:39, John Woodgate <jmw@...> wrote:

0.2 mm sounds OK, but it's only eight thousandths of an inch. Any defect, even a change of hardness/annealing, in the copper creates a stress-concentration joint, leading to a crack. I think you should make the tracks as wide as possible, for good reliability.

On 2024-01-11 16:01, Robert via groups.io wrote:

The lines concerned are I2C clock and data, and yes, I will be
considering them as transmission lines. However, there's no point
laying something down that is electrically just fine if the board cannot
be manufactured reliably or the tracks break during assembly (it will
get bolted down, but before that happens someone will have to pick it up
and move it into position).

Chinese PCB houses can routinely achieve 0.15 mm on normal sized boards.
So am I worrying about nothing, because they will in fact have no
trouble with a track (say) 0.2 mm wide and 500 mm long, if that's what I
would choose from an electrical viewpoint?

Regards,

Robert.

* Plain text email - safe, readable, inclusive. *

.

Cheers, Gene Heskett.
--
"There are four boxes to be used in defense of liberty:
soap, ballot, jury, and ammo. Please use in that order."
-Ed Howdershelt (Author, 1940)
If we desire respect for the law, we must first make the law respectable.
- Louis D. Brandeis

.

Cheers, Gene Heskett, CET.
--
"There are four boxes to be used in defense of liberty:
soap, ballot, jury, and ammo. Please use in that order."
-Ed Howdershelt (Author, 1940)
If we desire respect for the law, we must first make the law respectable.
- Louis D. Brandeis

Hi
I thought I knew how to use the 'add pin tool'.?? mmm?? Not quite yet.

I can get into the schematic edit screens etc and select in my case the? L272M (want to show the 98 pins in schematic) when I ask for the bulk edit if I select a group of 3 pins to add,? the added pins do not? get? shown in the diagram? ? Tried different ways but still no success.

Should not the?? 'Add Pin Tool '?? be showing on the vertical menu on the right of screen.?? Not there and I cannot (Google search) find how to get it added.

Thankyou
Charles

Thanks everyone for your messages.
Realized that it in? fact is a?? 12F629 for which there is a drawing.?? I will however learn the ropes for creating my own as you suggest.

Where do I locate the? 'distributed library'.

Have worked out how to add pins to op amps L272 etc.

Enjying this softwaare

Charles

开云体育

Different tools have different interpretations and implementations. As a long time Protel user (read (Altium), I recall keep-out wasn't a layer, it was a designation or property that could be placed on a polygon on any layer, the primary purpose of which was to prevent any copper within that area.

I guess, in this case, the OP has maybe imported an Eagle design into KiCad and it has preserved the layer name, but it may have lost its original function in KiCad. KiCad has gone a similar route (please pardon the pun) to Protel. You can place a "Rule Area" on any layer, within which you can define what objects are prohibited or accepted in that area. This is much more flexible than a restricted or keep-out layer.

Overlapping components are dealt with by a completely different means: by courtyards, which are layers associated with footprints, and which form inputs to the DRC (Democratic Republic of Congo - oops, I mean: Design Rule Checker).

At least in Eagle, tRestrict or bRestrict keeps copper pours out of an area, and will also generate DRC errors for any copper routed through the area.

The keepout layer is intended to mark used areas of placed parts to prevent parts overlapping. Or with a polygon to mark locations not to place parts.

Yellow circle means i require negative copper area at yellow location by using kicad.

I get that impression Tony, but I'm still trying to work out what
shape is being used as the keepout boundary. The pin quite clearly has
no connection to the top (pink) layer, but is the yellow circle the
keepout that is wanted?

The question doesn't have enough information to reach the full conclusion.

On 08/02/2024 17:07, Dan Kemppainen wrote:

I think they mean achieve (autocorrect???) a top restrict polygon like in eagle. This prevents copper pour wherever Top Restrict shape exists.

I don't know the answer, so didn't respond.
I'm still using eagle full time, so know exactly what's being asked. ?

Thanks. Answering the question clearly isn't always the right thing to do.

BTW, is it what mere mortals would call a keep-out?

--
Regards,
Tony

I think they mean achieve (autocorrect???) a top restrict polygon like in eagle. This prevents copper pour wherever Top Restrict shape exists.

I don't know the answer, so didn't respond.
I'm still using eagle full time, so know exactly what's being asked. :)

Dan

I would agree, create it yourself, using the KiCad guidelines, and
submit it for inclusion in the distributed library. That way everyone
gets to use it.

On Thu, 8 Feb 2024 at 09:08, Angelo Adamo - QSD
<angelo.adamo@...> wrote:

Why don't try to create the symbol by yourself? It Is a very simple task and could be a good exercise for the future.

Il gio 8 feb 2024, 09:02 Charles Harris <railroads@...> ha scritto:

Hi
Thanks for the add to group.

In a schematic I have a PIC16F629.
This does not appear on the IC list.
Is there a later PIC that is equivalent, 8 pin ?

Thanks
Charles

On 08/02/2024 10:14, Zeriya Amin via groups.io wrote:

Hope this mail finds you well!!!

How can we archive this thing in kicad ?

Did you try File > Archive in the KiCad app?

--
Regards,
Tony

Hi
Thanks for the add to group.

In a schematic? I have a PIC16F629.
This does not appear on the IC list.
Is there a later PIC that is equivalent, 8 pin ?

Thanks
Charles