开云体育

Re: Signal Mast Logic Translation Latency #sml


 

On 4/10/2025 11:30 PM, Hunter via groups.io wrote:

I am convinced it does not have to do with the CMRI network as I get the same result running the layout in simulation at home on a very powerful computer.
Are you using ANY "Logix", "LogixNG", or "Jython Scripting" which can cause a signal mast to change its indication? That could cause the "SML logic" to "oscillate" between indications - one from JMRI's SML logic, and another from the other "logic". I would suggest that you look at the JMRI "Signal Masts" table, and look for one or more masts that are changing in odd ways.

What Baud rate are the CPNodes running at? Can you run the network at a higher Baud rate reliably? How much cable exists in your RS-422.RS-485 network?

Do you see _any_ problems where JMRI must re-initialize _any_ CMRI nodes? If so, you will need to resolve the problems that cause the "re-initialization" problems. "Re-initialization" should NOT be necessary on a well-architected RS422/RS-485 network.

If you have "Re-initialization" problems, then the problem is often a hardware problem. I would suggest that the "4-wire" RS-422/RS-485 connection is likely a problem, and that a properly-installed 5-wire cable, with a "hack" to connect each "fifth wire" to the "ground" _at each end_ will likely reduce/resolve the "re-initialization" problem. But that is not a JMRI problem or a JMRI solution, so I won't go into that any further.

There are other "issues" with RS-422/RS-485 networks, but those are not JMRI problems, so I won't go into those any further.

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