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Re: Latching Relay Drivers


 

I had to go and dig for JK schematic. I have always (way back when) used NAnd gates to create. Did not know there were JK ff ic packages. Maybe I did, and just used NAnd as the lab from TI missile systems was very generous with NAnd, NOr as well as XNAnd and XNOr. No guidance chips however :(

Do have a bunch of old Spartan FPGAs. Definitely do NOT remember how to program those, besides software was on the 486. I have backup media somewhere... on floppies.

I actually found a pic of my notes (d. cameras still new and rare). Amongst other scribbling (regarding questionable parental lineage of the class instructor) was the line:


(2) 3input NAnd (2 j/k, 3 clock, 1(k) ties to output, 1(j) ties to comp output. Each Gate output ties to 2 input NAnd, whose 2nd input ties to other output.


I don't remember use or provision for set / reset lines. But, looking at ic packages, there are preset and clear. I think these might be the first inputs of 3 input NAnd that are connected to complimentary outputs.

It seems that every 'off the shelf' latch relay I looked at had some sort of 2/4/8 bit microprocessor, or intended to be tied to arduino/raspberry pi/etc.

Plan was to use NAnds to create my FF, input denounced using Schmidt trigger after a 300mS or so delay. So far, actual chip count is 4 for single relay: (1) 3ip NAnd, (1) 2ip NAnd, Schmidt Trigger, and the 2038. 2ndcrelay would need another asst of NAnds. Plus inverter so have active low on strobe to improve noise immunity. Drivers / Latches were intended to be in seperate housing than relays.

~SD

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