I have been using my DR5000 for well over a year and have not had problems with loco or turnout/signal addressing - until now. (That is I have had some addressing problems that I have been able to avoid until now.)
I have been trying to set up DCC control of Qdecoder Signal decoders controlled by my DR5000 which is in turn controlled by Rocrail. (I also have a Roco multimous wired to the DR5000 for manual control) I have also tested with the DR5000 configuration software via USB. After much head scratching I finally attached a DCC sniffer to analyse what is actually happening on the wires. I have found that the actual DCC addressing on the wire is offset by +14 (for DCC accessory modules) or +57 (for DCC Accessory ports). I don't understand why there is this offset since the DR5000 logging window (and Rocrail) report the correct addressing.
I have 6 DR4018 and 3 simple Qdecoder signal modules attached and these work OK because they were programmed for addressing using their reset buttons and Accessory commands from the DR5000 so the devices have taken the addresses I assigned - except they havn't and are working with address offsets described above. I do have Loconet connected 1xDR4088, 4xDR5088, 1xDR5052 and 1xDR5033 which appear to work correctly.
The Qdecoder signal modules are necessarily pre-programmed (the signalling sequences are not simple) and work with the correct addresses (port addresses 401 upward) on my test system (Rocrail and SPROGII for DCC). It is this I am having problems with due to the (invisible) addressing offset.
There must be a simple reason for the offset but I do not know what that is. Could it be my DR5000 configuration? Or attached Loconet feedback/tt/booster modules? Or Roco multimaus?
I add extracts (full file attached) with command of a turnout supposedly at Module Address 21 Port 1 (Port address 80) (a DR4018)
[LL1] T:? 80 /*
[LL1] T:? 80 //
[LL1] T:? 80 |*
[LL1] T:? 80 ||
and a Qdecoder signal module at Module Address 101 Port 1 (Port address 400) -two commands for correct aspect.
[LL1] T: 401 /*
[LL1] T: 400 /*
[TM0] T: 400 //
[TM0] T: 401 //
From DCC Sniffer:-
09:09:09.229 -> Decoder Address is:- 35 Packet Data is:- Acc 137 35:0 Cmd bit is? Off O/P bit is? Off
09:09:12.075 -> Decoder Address is:- 35 Packet Data is:- Acc 137 35:0 Cmd bit is? On O/P bit is? On
and:-
09:09:23.735 -> Decoder Address is:- 115 Packet Data is:- Acc 457 115:0 Cmd bit is? On O/P bit is? Off
09:09:23.769 -> Decoder Address is:- 115 Packet Data is:- Acc 458 115:1 Cmd bit is? On O/P bit is? Off
09:09:23.769 -> Decoder Address is:- 115 Packet Data is:- Acc 457 115:0 Cmd bit is? On O/P bit is? Off
09:09:23.802 -> Decoder Address is:- 115 Packet Data is:- Acc 458 115:1 Cmd bit is? On O/P bit is? Off
TIA Tony
