Attached is a revised LT-Spice simulation of the QMX final, also placed under KE7ER under files.
There are four separate instances running simultaneously allowing waveforms to be easily compared.
T501 is assumed to be perfect, and wired for 9v.? I doubt the 9v T501 matters much in comparing topologies.
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I am now using Evan's SPICE model for the BS170, have two sets of two in parallel.
Now using L508 and L512 reference designators instead of L1, L2.
Corrected the value of C515 from 580pF to 680pF.
None of that made much difference in the simulation.
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The four instances are:
1)? QMX Stock Final.??
2)? Same as above, but removed L502
3)? Same as above but replaced the LPF with a series LC filter with a Q of 3, should be a VMCD topology.
4)? Same as above but removed T501 center tap and added two L502's, now an LC parallel filter, should be CMCD topology.
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There would be tradeoffs in moving to any of these schemes.
Clearly the LC filters would need to be improved on my VMCD and CMCD instances.
Bringing this closer to a true VMCD implementation does reduce Vds-max considerably as expected
though the CMCD implementation has a Vds-max not far from that of the stock implementation.
The CMCD has the most power out of any.
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We could simply recommend that everyone build for the 9v power supply, that may cure most of the issues
with BS170's getting blown from over-voltage.? However, that would increase BS170 current, and may
cause more failures during high duty cycle operation in digital modes from over-heating.
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Here's the math (in python) I used in calculating a Q of 3 for the simple serial and parallel LC filters:
from math import pi, sqrt
Q=3; R=50; w=2*pi*3.57e6;?
Cs=1/(w*R*Q); Ls=1/(w**2*Cs); print(Cs, Ls)? ? ?# Serial LC values
Cp=Q/(w*R); ? Lp=1/(w**2*Cp); print(Cp, Lp)? ? ? # Parallel LC values
Qs=sqrt(Ls/Cs)/R; ?Qp=sqrt(Cp/Lp)*R; ? print(Qs, Qp)? # Double check
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Jerry, KE7ER
