Ryuji and Nick,
As they say, there is more than one way to skin a cat. Posting images
will further communication here.
I have posted a couple of simulation plots below. The first focuses on
the cycle-by cycle spikes at the center tap of the output transformer.
Oscilloscope probing is in general agreement with simulation.
The second plot has been run out longer to include the
end-of-transmission moment. In that run, I followed Evan, friend and
collaborator, in turning up the breakdown voltage contained within the
BS170 transistor model to 1000 volts. This, so as to better see the
raw intensity of the Ldi/dt spike produced at EOT in QDX. A
commutating diode has been left open to allow this spike to occur.
Ditto for Zener diodes.
JZ KJ4A
toggle quoted message
Show quoted text
On Thu, Sep 21, 2023 at 2:30?PM Ryuji Suzuki AB1WX <ab1wx@...> wrote:
I appreciate your effort and discussion, but this is one place I would have to see it in real circuits before taking any action.
#43 ferrite is a wonderfully lousy material. It is perfectly imperfect choice (or imperfectly perfect choice) in some uses, but not many. It is difficult to build a good SPICE model for inductors wound on ferrites.
I do think the spikes due to keying is real. But that can be mitigated by a number of ways... zener diode, flyback diode, parallel resistor, or simply adopt LDMOS and forget about little issues.
