Hans said the sequencing was set for about 250ms. Your plots show the 3.3V Linear regulator coming on at t=0 but something happens to the 3.3V at t=80ms to t=200ms. I don't know what. Then it continues on to about t=250ms when the 3.3V SMPS is turned on?(notice a slightly higher level .....no problem, but you can't tell if the 3.3V from the Linear regulator is now turned OFF .....except for the now back biased D103? ? ?and it has more noise .....no problem).??
The 5V VCC also starts coming up at t=0 along with VDD but does not reach an operational "high" level until well into the 250ms sequence cycle. Can't tell exactly where from those plots.
I wonder if others have seen the same plots ?? Thank you again.
I would guess at t=80ms the processor is starting to initialize and run and is doing something else major at about t=200ms. Maybe you need a larger C103 to help stabilize the 3.3V Linear Regulator output until the SMPS takes over.?
73 Kees K5BCQ
