Jules, I don't think this is the case for polarity.? This is what I say in the latest version of simpleP48.pdf
POLARITY SimpleP48basic
The usual electret with FET has the capsule capacitance between Source & Gate. When the air pressure rises, the capacitance increases, Vgs & FET current goes down, Vds increases¡. so the Drain goes up and the Source, down.
We connect FET Drain (usually marked + on the capsule) to XLR p2. C1 connects the Source (usually the case on a 2-wire capsule) to XLR p3. p2 goes +ve wrt to p3 with a pressure increase ¡ which is the AES standard for balanced lines and microphones.
SimpleP48RCA
Here the capsule capacitance is between Gate & Drain. Increasing air pressure makes the capacitance increase, current increases and Vds goes down. The Drain goes down and Source, up.
We connect Drain to XLR p3 and the Source, via C1 to XLR p2
My latest ravings put me in-line with Henry Spragens & Rick Wilkinson.? Any other gurus want to join in?
