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Re: HP8568B


Bob Dildine
 

Gentlemen,

Trying to adjust loop bandwidth by shunting the YTO tuning coil(s) with a
resistance might not be a very good idea. I'm not familiar with YTO coil
drivers in the HP 8568B, but I designed the main coil and FM coil drivers in
the HP 8672A synthesizer which preceded the 8568 by a few years. All the HP
microwave instruments of that period used variations of the same YTO design.
The main coil driver needs to be as close to an ideal current source as
possible, as it is the current through the coil that controls the YTO
frequency. The temperature coefficient of the copper wire in the coil is
very high (I seem to recall it's on the order of 4000 ppm/C and quite
variable, but I'm not sure). Any resistance across the coil acts as a
current divider with very poor TC and will lead to pre-tuning errors that
are a function of temperature, so can't be adjusted out.

Again, I'm not familiar with the HP 8568 phase locked loop, but in most
designs, the loop locks the YTO via the FM coil. Often the DC portion of the
loop's error voltage is routed to the main tuning coil via a simple
cross-over network (similar to the cross-over network in hi-fi speakers) and
the high frequency portion (above a hundred hertz or so) is routed to the FM
coil. The gain through both paths is adjusted so the loop sees a constant
YTO tuning sensitivity vs. the frequency of the tuning voltage. I don't know
if this was done on the 8568, but you should be able to figure out just what
the original designers did by examining the circuit schematics in the area
from the loop integrator though the YTO coil drivers.

If you need to adjust the loop gain to compensate for the tuning sensitivity
of a different YTO, it would be probably be best to do it in the YTO coil
drivers or in the loop integrator. But I recommend first doing a complete
analysis of the circuits involved so you understand how they are supposed to
behave and so you don't change the overall behavior. Designing a phase
locked loop for low phase noise and good frequency agility is not a trivial
task. I also recommend documenting any circuit changes (maybe paste them
inside one of the instrument's covers?) so the next guy knows what you did.

Maybe someone closer to the original 8568 design can make more specific
comments.

Regards,

Bob Dildine

________________________________

From: hp_agilent_equipment@...
[mailto:hp_agilent_equipment@...] On Behalf Of Chris Bartram
Sent: Tuesday, November 21, 2006 06:41
To: hp_agilent_equipment@...
Subject: [hp_agilent_equipment] HP8568B



John

> Glad to hear you made some progress. Sounds like the replacement
YTO was
> too sensitive (degraded phase margin and increase in loop BW due
to
> increase in overall loop gain), correct? I wonder if the best way
to fix
> that would be a shunt resistance across the tuning coil. There's a
lot to
> be said for not altering the loop filter itself, if possible. It
has to
> work over a rather-wide range of conditions as the analyzer sweeps
across
> the band.

Thanks for that thought. I can't argue with your logic! I'll try it
when I
next summon-up the physical strength to lift the analyser off the
shelf where
it lives!

FWIW I did look for a change in loop performance, using the shape of
the noise
pedestal across the tuning range of the analyser, and it seemed
pretty
consistent at both of the band edges and at its centre. I didn't
have the
time or energy to look at the loop using more formal methods...

Vy 73

Chris
GW4DGU

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