After reading a little more, I discovered that the clock signal for the display is not generated in A15, but in A14, specifically in U13 (pn 1820-1194 or 74LS193 up/down binary counter) . This signal is the result of divide by 64 the decimal point signal to use it for refresh the display.
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I leave you the high quality diagrams of A14 and A15. I have put them together, because in the Artek manuals they are divided and it is very uncomfortable to explore them.
RubenRubio
