Hi,
There is a version of the 3325B service manual, which has some service
notes and other documents inside. It used to be available at
Keysight's web page, I can't find it now there, but I have it saved if
you need it. It is manual part no. 03325-90003. On page 186 it
discusses the jitter and concludes that you have to measure it right
(with very long gate times) to be in spec. It also says that phase
noise is only specified for opt 001 instruments, and it is -60dBc for
30kHz at center of 20MHz.
It is interesting of what you say about Marc. I had the opposite
experience, I pointed out to him in the previous video, where he fixed
the 3325A that he should actually read the whole adjustment section in
the SM, as having the PSU voltages in spec is the first step, they may
need to be adjusted out of spec in later steps when adjusting the AD
levels. He even responded to my post and i was not banned.
However, you may want to contact Ken, he seems to be quite responsive
on his - absolutely fascinating - blog, where among other awesome
stuff, he discusses the same Soyuz clock.
Szabolcs
Raymond Domp Frank <hewpatek@...> ezt ¨ªrta (id?pont: 2020. ¨¢pr.
12., V, 18:42):
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In the video referred to above, Marc shows a large phase noise at low output frequencies as a result of the 3325A's (fractional-N) PLL-architecture. It's really quite significant, completely obscuring less significant setting digits for LF signals observed over intervals of only a few periods. He shows a frequency jitter on the order of several ppm for output frequencies of a few Hz. Imagine what it's like at a few uHz....
I have tried to find specifications of this but haven't found any. Since it's quite a significant feature, I'd like to know if such specifications exist or may be derived for specific models.
I tried putting a comment re. this in the comments section to the videos but found out that I have been banned after expressing my doubts about the way Marc feeds the frequency reference into the clock. My two polite posts have been made invisible to others (logged in I still see them) and I haven't received any response from Marc after trying several emails to different email addresses. Not important but annoying.
So, I'm addressing this group, hoping for more about the phase jitter.
In case anyone is interested, my posts addressed the following:
1. Marc concluded that a 400 Hz carrier with a 2 Hz modulation (100%) is needed at the frequency reference input. The Soyuz clock seems to use a 2 Hz reference inside, right after the input section.
Although I like Rube Goldberg solutions at times and enjoyed the setup with a cesium clock (5061A), a synthesizer (3325A) and a 400 (800?) Hz signal generator (8116A), I found the need for the rather complicated signal onboard the Soyuz enjoyable but unlikely. Just the 3325A, for fun's sake driven by the 5061A would seem enough. Maybe the input circuit in the Soyuz clock is broken...
Looking at Ken's (?) hand-drawn schematics, I concluded that just a 1 Hz square wave with appropriate edge speed and amplitude should do, since the full-wave bridge rectifier at the signal input would produce same-polarity output pulses from the input circuit at 2x the input frequency already. Using the 400 Hz carrier and (2 Hz) 100% modulation *kills* the internal frequency doubling, so by using that, a 2 Hz modulation is needed.
2. In a second post, I suggested that the diode in the top middle of the drawing probably was drawn upside down.
As said, I was - and still am - banned and no contact has been possible.
I have built up an input circuit exactly like Ken's in the video, except with the diode inverted as I suggested and with a small (pulse) transformer at the input. It operates exactly as anticipated: 1 Hz in, nice 2 Hz pulse out, duty cycle configurable. I used only a 5V supply and a 4-5V input signal. You may try for yourself if you like. Hint: The bridge output *positive* terminal is at gnd.
I wonder why I was banned, resulting in my posts being invisible...
Anyway, I'm interested in quantitative info on the phase noise for specific generators if possible or ways to derive it from specs that *are* available.
Raymond