while PLL chips are difficult to find, the 16F84 or the 16F628 are plentiful. why can't we program the PIC to behave as a PLL on it's own?
the PIC timer can be used to accurately measure the oscillator frequency (as normal PIC based frequency counters do) instead of displaying the frequency on a display, it can (in addition) also pump a capacitor that in turn is used to bias a varactor across the VFO.
if chris and his merry band can do a single chip HnP, there is no need to assume that they can't turn out a single mirochip PLL too.
the rumors about having to program the pics are exaggerated. probably an audio amplifier is more of a challenge than wiring togther a PIC programmer. i build one whenever i need to program a pic, it is usually easier to solder a couple of diodes than search out the old programmer again.
- farhan
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On Sat, 9 Jul 2005, eb7hpm wrote:
Thanks for your helpful coments, Rahul.
You are right in the DDS issue, the PLL chip could be dificult to
find. I don't like DDS for the noisy output, but I am not tested
this and I am not make a DDS prototipe yet.
Using a PIC could be complicate in software programing and chip
programing, but then it is easy. Using a PIC offers more
posibilities to the transceiver and ease operation in my opinion.
I don't want to change the easy bilateral BITX configuration, I try
some high Ft transistor an then possibly I keep the low FI. I change
it to 12MHz for a problem with 10MHz in my BITX 15meter band. The
second armonic in 20MHz was at the antena with the useful signal at
21.185MHz, then ROE adjust was impossible !!!
Manuel
EB7HPM/EC7ALV
--- In BITX20@..., Rahul Srivastava <vu3wjm@y...> wrote:
Hi! Manuel,
It is not that we missed your work in fact we looked at it with
great interest. I was interested in a PLL design for VFO for long.
My opinion by using a PIC we complicate things.
Now a PIC and 145170 combo is as simple / complex as PIC and
AD9851. Since we can get the DDS chips as free samples hence a DDS
design appears more practical.
This does not means that a PLL is no viable , I have been working
on a dicreet design using 74192 chips with 10Khz ref pulling. The
same comcept can be implemented upon a MC145151 as done in Multipig
design.
You are right about high ft IF limitations . As per simulations
done by our Prof Rob there appers roll off of frequency due to
highly negative feedback nature of amp designs. I am evaluvating
results of high Ft BJT devices. Maybe one back this design would
evolve into a basic building block towards a multibander.
73
Rahul VU3WJM
eb7hpm <msraya@t...> wrote:
I want to contribute the comunity with my work and that you not
missed the earlier post. I don't want recognition, I only want to
ear coments about the circuit from more experienced hams, I am
computer engineer!! ;-). I was looking for a good, simple and easy
design in the Internet but I not found it, It is the reason I make
the design and program to drive the PLL.
I don't know the designs of VK6BRO Richard Hosking, but i think
they
are complex. I will publish this work in the huff-puff group.
P.D: My BITX with a FI of 32MHz and VCO of 53MHz is working, but
it
is very bad, with BF495 transistor, i only output 1 Wat, and the
PLL
show some inestability. The VCO, BFO and filter works at 32MHz. I
think the bilateral amplifier don't work at 32MHz. I miss
something?
73s
Manuel
EB7HPM/EC7ALV
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