If you were to produce the correct sine values for each point, you are describing a DDS.? If your samples are fast enough, this might push harmonics out - but in the case of a 30MHz carrier (call this Fw, for the wanted frequency) and 120MHz sample rate (call this Fs, for the sample rate), you only have 4 samples per cycle? These 4 samples would be [0, 1, 0, -1] - or apply a DC offset if you choose.? This resulting waveform will result in energy at:
Fw (this is good!)
(Fs - Fw) (Not good - this is identical to the third harmonic!)
Fs (sample rate, also fourth harmonic)
(Fs + Fw) (fifth harmonic)
(2Fs - Fw) (seventh harmonic)
...and so on.
Overall, you would need significantly more samples/waveform to improve upon the 3rd harmonic spur - but I suppose if you varied your samples/waveform as you lowered in frequency, this could actually push out unwanted energy.? Of course, building a discrete DDS DAC and keeping it clean, waveform-wise, isn't easy...
On Sun, Mar 3, 2019 at 7:58 PM Dexter N Muir <dexy@...> wrote:
I glimpsed an article a while back that said the SI5351 could be driven well beyond HF. If that could be 120MHz, let's fantasize: 120MHz is within the capabilities of an up/down counter. Let's say 0-1-2-3-2-1-0... Now use those logic levels to drive resistive dividers to a common output: Pseudo-sine! (somewhere between square and triangle, with a bit of filtering, more effective approaching 30MHz: the step-frequency is 120MHz, easily filtered out). Different counts could serve different bands or ranges, with the 120 clock varying as required to give finer frequency control. Add the present filtering and you're closer to Sine drive to the finals :) What say? 73 Dex, ZL2DEX
