Gary, my understanding is that the I2C bus is only open drain when reading back the "ACK"? 9th bit on the data line. I may well be wrong here.? Bit banging implementations for I2C will not all be open drain either.
Philips publish an Ap note on using logic level translation on the I2C bus when different voltage levels are used. They use FET's and pullups as no doubt you have seen. Since they invented I2C I assume they know what they are talking about??? In any case, it costs pennies only and is in my view, good practice.
glenn
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On Mon, Aug 6, 2018 at 11:13 PM, Gary Anderson wrote:
Glen, concerned about your logic level translator implementation w.r.t. I2C bus.? This is an open drain bus.? Nothing should be actively driven High.? The high state is handled by pull-up resistors.? Pull-up to 3.3V from Si5351 supply.? ?If one part is actively driving HIGH and another part on the bus drives LOW, there is bus contention with high currents on the I/Os which could lead to part destruction.??
Rgds,
Gary
