I verified that the stock uBitx code does correctly shut down clk0 and clk1 during CW transmit.
Turning them back on takes awhile, as all the computations get redone and all pertinent si5351 registers loaded.
We could speed this up by several milliseconds by talking only to the si5351 clock enable register
Might be significant for some high speed CW operators.
// At start of CW transmission:
i2cWrite(3, 0xfb);? ?// clk2 on, clk1 and clk0 off? ?
// At end of CW transmission:
i2cWrite(3, 0xf8);? ?// clk2 and clk1 and clk0 on
You also must change clk2 to the operating freq and back.
Jerry
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On Sat, May 26, 2018 at 06:02 pm, Jerry Gaffke wrote:
On CW transmit, the VFO is moved to the operating frequency, and we can shut down clk0 and clk1 entirely if we wish.
If clk0 and clk1 remain active during CW transmit, we could be transmitting stuff from the mike at at 45mhz minus the operating frequency.
