Hi,
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I don't know enough about the system and application's architecture to understand the latency issues yet.
Are you using the stock Debian kernel? ?Or a kernel with real-time modifications (RTLinux, et.al.)?
What does the CW sending loop look like? ?How often does it poll? ?What sample buffer sizes is it dealing with?
Are there any underflow or overflow issues to deal with when generating samples?
One thing you might try is calling clock_gettime() within the key ISR to time stamp pin state changes.
That information would allow the polling loop to determine which key input changed first, if both changed between polls.
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There are serious limitations with what can be done given a single-core processor running a non-real-time OS kernel.
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73, Ron, n6ywu
