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Re: SBitx: Capacitor across gpio's tx line

 

Sorry to ask a stupid question, but what is the issue with C66?

It may not be a good design to delay TX to Q5 and the rest of the TX use points, but not sure it could cause damage.? I would be more worried about the many devices that use the unbuffered TX line.? GPIO guidelines say 16ma total.? Not sure what the total pulsed current would be on the TX start.

73
Evan
AC9TU
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