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Hi Stephano, I have a question: In the DTS for APLIC/IMSIC, only the number of interrupts is defined. When a linux virtual machine (which thinks it's the only one in the world) starts up, it will initialize the interrupts from number zero. Let's imagine we have 2 virtual machines, both running linux. They will each initialize the same interrupt numbers. How do you handle this in ARM? Do I have to implement an interrupt number mapping in the 'vaplic'? If so, do I do it by retrieving the interrupt numbers of the devices associated with the domain (the device is reserved for the domain), or do I create a big bitmap in the DTS that describes the mapping for the domain, or some other solution (like duplicates the principle used for ARM) ? Regards, Romain

Hi all, Good news !!! Xen with Dom0 is running on our hardware emulation platform with AIA support. I can now reach the Dom0 console using the UART interrupt number 84. [ 0.000000] riscv-imsic: imsic1@d001000: hart-index-bits: 2, guest-index-bits: 3 [ 0.000000] riscv-imsic: imsic1@d001000: group-index-bits: 1, group-index-shift: 29 [ 0.000000] riscv-imsic: imsic1@d001000: mapped 255 interrupts for 1 CPUs at 0x000000000d100000 [ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention. [ 0.000000] clocksource: riscv_clocksource: mask: 0xffffffffffffffff max_cycles: 0x171024e7e0, max_idle_ns: 440795205315 ns [ 0.000001] sched_clock: 64 bits at 100MHz, resolution 10ns, wraps every 4398046511100ns [ 0.000432] Console: colour dummy device 80x25 [ 0.000613] Calibrating delay loop (skipped), value calculated using timer frequency.. 200.00 BogoMIPS (lpj=1000000) [ 0.000951] pid_max: default: 32768 minimum: 301 [ 0.001170] Mount-cache hash table entries: 512 (order: 0, 4096 bytes, linear) [ 0.001412] Mountpoint-cache hash table entries: 512 (order: 0, 4096 bytes, linear) [ 0.003722] riscv: ELF compat mode unsupported [ 0.003735] ASID allocator disabled (0 bits) [ 0.004170] rcu: Hierarchical SRCU implementation. [ 0.004329] rcu: Max phase no-delay instances is 1000. [ 0.005013] devtmpfs: initialized [ 0.006009] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.006331] futex hash table entries: 256 (order: 1, 12288 bytes, linear) (XEN) guest_sbi_ext_base: Unsupport FID #4 (XEN) guest_sbi_ext_base: Unsupport FID #5 (XEN) guest_sbi_ext_base: Unsupport FID #6 [ 0.008404] riscv-aplic: interrupt-controller@c008000: 96 interrupts forwared to MSI base 0x000000000d100000 [ 0.010068] clocksource: Switched to clocksource riscv_clocksource [ 0.018761] workingset: timestamp_bits=62 max_order=12 bucket_order=0 [ 0.024750] Unpacking initramfs... [ 0.045705] Freeing initrd memory: 520K [ 0.091716] Serial: 8250/16550 driver, 1 ports, IRQ sharing disabled [ 0.093273] printk: console [ttyS0] enabled [ 0.093273] printk: console [ttyS0] enabled [ 0.093508] printk: bootconsole [sbi0] disabled [ 0.093508] printk: bootconsole [sbi0] disabled [ 0.094478] riscv-pmu-sbi: SBI PMU extension is available (XEN) UNKNOWN Guest SBI extension id 0x504d55, FID #0 [ 0.094736] riscv-pmu-sbi: SBI PMU extension doesn't provide any counters [ 0.094911] start plist test [ 0.099044] end plist test [ 0.106033] debug_vm_pgtable: [debug_vm_pgtable ]: Validating architecture page table helpers [ 0.106520] clk: Disabling unused clocks [ 0.107022] dw-apb-uart 104168000.serial: forbid DMA for kernel console [ 0.107583] Freeing unused kernel image (initmem) memory: 176K [ 0.107727] Kernel memory protection not selected by kernel config. [ 0.107883] Run /init as init process [ 0.107973] with arguments: [ 0.108046] /init [ 0.108103] with environment: [ 0.108180] HOME=/ [ 0.108240] TERM=linux BusyBox v1.37.0.git (2023-07-05 10:57:28 PDT) built-in shell (ash) ~ # cat /proc/interrupts CPU0 1: 102 RISC-V APLIC 84 Level ttyS0 5: 0 RISC-V INTC 5 Edge riscv-timer ~ # cat /proc/interrupts CPU0 1: 115 RISC-V APLIC 84 Level ttyS0 5: 0 RISC-V INTC 5 Edge riscv-timer ~ # Regards, Romain

Hi all, These two patches implement the CONSOLEIO console for dom0less guests. I tested them on ARM and they work (but you need to make sure to remove the vpl011 property in device tree if you are using ImageBuilder.) On risc-v, they should work but max_init_domid needs to be set appropriately. It needs to be set to the max domid of the dom0less domains. I hope this helps! Cheers, Stefano

Hi all, I have the following assert true when I changed the starting address in QEMU from 0x8000_0000 to 0x20_0000_0000: static inline void *maddr_to_virt(paddr_t ma) { ASSERT(ma - mfn_to_maddr(xenheap_mfn_start) < DIRECTMAP_SIZE); return (void *)(XENHEAP_VIRT_START - (xenheap_base_pdx << PAGE_SHIFT) + ((ma & ma_va_bottom_mask) | ((ma & ma_top_mask) >> pfn_pdx_hole_shift))); } FOR ENTRY ADDRESS AT 8000_0000 (QUEMU default) PG = 01_41B9_DF90 Xenheap_mfn_start = 0008_0000 DIRECTMAP_SIZE = 5D_0000_0000 frame_table = 01_4000_0000 frame_table_base_pdx = 0 => page_to_mfn = 000F_E3FE => ma = FE3F_E000 FE3F_E000 - (0008_0000 << 12) FE3F_E000 - 8000_0000 = 0x7E3F_E000 <- subtraction is ok FOR ENTRY ADDRESS AT 20_0000_0000 PG = 01_1BFF_FF90 Xenheap_mfn_start = 0200_0000 DIRECTMAP_SIZE = 5D_0000_0000 frame_table = 01_4000_0000 frame_table_base_pdx = 0 => page_to_mfn = 0x7_FFFE => ma = 7FFF_E000 7FFF_E000 - (0200_0000 << 12) 7FFF_E000 - 020_0000_0000 = FFFF_FFE0_7FFF_E000 <- subtraction is not ok and assert is raised because it is greater than DIRECTMAP_SIZE the backtrace : #0 maddr_to_virt (ma=2147475456) at /proj/digi_bby_sw2/users/c71245/hpsc-xen/xen/arch/riscv/include/asm/mm.h:186 #1 0x000000000020ca1a in page_to_virt (pg=pg@entry=0x141bfff90) at /proj/digi_bby_sw2/users/c71245/hpsc-xen/xen/include/xen/mm-frame.h:7 #2 0x000000000020e5e6 in scrub_one_page (pg=pg@entry=0x141bfff90) at /proj/digi_bby_sw2/users/c71245/hpsc-xen/xen/common/page_alloc.c:2625 #3 0x000000000020ec6e in alloc_heap_pages (zone_lo=zone_lo@entry=1, zone_hi=zone_hi@entry=27, order=order@entry=0, memflags=memflags@entry=0, d=d@entry=0x0) at /proj/digi_bby_sw2/users/c71245/hpsc-xen/xen/common/page_alloc.c:1046 #4 0x000000000020edbc in alloc_domheap_pages (d=d@entry=0x0, order=order@entry=0, memflags=<optimized out>, memflags@entry=0) at /proj/digi_bby_sw2/users/c71245/hpsc-xen/xen/common/page_alloc.c:2448 #5 0x0000000000237c8e in vm_init_type (type=type@entry=VMAP_DEFAULT, start=start@entry=0x40000000, end=<optimized out>) at /proj/digi_bby_sw2/users/c71245/hpsc-xen/xen/common/vmap.c:37 #6 0x0000000000231d76 in vm_init () at /proj/digi_bby_sw2/users/c71245/hpsc-xen/xen/include/xen/vmap.h:38 #7 0x0000000000241eb8 in start_xen (fdt_paddr=<optimized out>, boot_phys_offset=<optimized out>) at /proj/digi_bby_sw2/users/c71245/hpsc-xen/xen/arch/riscv/setup.c:327 #8 0x0000000000200204 in start () at /proj/digi_bby_sw2/users/c71245/hpsc-xen/xen/arch/riscv/head.S:215 Thank in advance for your help! Romain

Hi all, I tried the kernel 5.19-rc7 (from linux github, not our version) for Dom0 but it freeze on my side. Can you try and tell me if you have the same problem ? (XEN) idle_loop [ 0.000000] Linux version 5.19.0-rc7 (c71245@...) (riscv64-linux-gcc.br_real (Buildroot 2021.11-4428-g6b6741b) 11.3.0, GNU ld (GNU Binutils) 2.38) #1 SMP PREEMPT Fri May 5 11:09:14 PDT 2023 [ 0.000000] OF: fdt: Ignoring memory range 0x80000000 - 0x80200000 [ 0.000000] Machine model: riscv-virtio,qemu [ 0.000000] earlycon: sbi0 at I/O port 0x0 (options '') [ 0.000000] printk: bootconsole [sbi0] enabled [ 0.000000] Zone ranges: [ 0.000000] DMA32 [mem 0x0000000080200000-0x000000009fffffff] [ 0.000000] Normal empty [ 0.000000] Movable zone start for each node [ 0.000000] Early memory node ranges [ 0.000000] node 0: [mem 0x0000000080200000-0x000000009fffffff] [ 0.000000] Initmem setup node 0 [mem 0x0000000080200000-0x000000009fffffff] [ 0.000000] SBI specification v1.0 detected [ 0.000000] SBI implementation ID=0x1 Version=0x10002 [ 0.000000] SBI TIME extension detected [ 0.000000] SBI IPI extension detected [ 0.000000] SBI RFENCE extension detected [ 0.000000] SBI HSM extension detected [ 0.000000] riscv: base ISA extensions acdfhim [ 0.000000] riscv: ELF capabilities acdfim [ 0.000000] percpu: Embedded 16 pages/cpu s26008 r8192 d31336 u65536 [ 0.000000] pcpu-alloc: s26008 r8192 d31336 u65536 alloc=16*4096 [ 0.000000] pcpu-alloc: [0] 0 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 128775 [ 0.000000] Kernel command line: rw root=/dev/ram console=hvc0 debug earlycon=sbi [ 0.000000] Dentry cache hash table entries: 65536 (order: 7, 524288 bytes, linear) [ 0.000000] Inode-cache hash table entries: 32768 (order: 6, 262144 bytes, linear) [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off [ 0.000000] Virtual kernel memory layout: [ 0.000000] fixmap : 0xff1bfffffee00000 - 0xff1bffffff000000 (2048 kB) [ 0.000000] pci io : 0xff1bffffff000000 - 0xff1c000000000000 ( 16 MB) [ 0.000000] vmemmap : 0xff1c000000000000 - 0xff20000000000000 (1024 TB) [ 0.000000] vmalloc : 0xff20000000000000 - 0xff60000000000000 (16384 TB) [ 0.000000] lowmem : 0xff60000000000000 - 0xff6000001fe00000 ( 510 MB) [ 0.000000] kernel : 0xffffffff80000000 - 0xffffffffffffffff (2047 MB) [ 0.000000] Memory: 506908K/522240K available (2047K kernel code, 677K rwdata, 885K rodata, 203K init, 245K bss, 15332K reserved, 0K cma-reserved) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1 [ 0.000000] rcu: Preemptible hierarchical RCU implementation. [ 0.000000] rcu: RCU event tracing is enabled. [ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=1. [ 0.000000] rcu: RCU debug extended QS entry/exit. [ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies. [ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=1 [ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0 [ 0.000000] riscv-intc: 64 local interrupts mapped [ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention. [ 0.000000] riscv_timer_init_dt: Registering clocksource cpuid [0] hartid [0] [ 0.000000] clocksource: riscv_clocksource: mask: 0xffffffffffffffff max_cycles: 0x24e6a1710, max_idle_ns: 440795202120 ns [ 0.000142] sched_clock: 64 bits at 10MHz, resolution 100ns, wraps every 4398046511100ns

· Fix missing some SBI ecalls · Fix DOM0 boot exception · Fix Duplicate name in base, renamed to "memory@80000000#1" (temporary disable reserved-memory)

This is the reason why we have a duplicate node, not yet fixed In function handle_node in file xen/arch/riscv/domain_build.c, there is a call to first make_memory_node and after a call to the second make_memory_node (for reserved-memory regions) res = make_memory_node(d, kinfo->fdt, addrcells, sizecells, &kinfo->mem); if ( res ) return res; /* * Create a second memory node to store the ranges covering * reserved-memory regions. */ if ( bootinfo.reserved_mem.nr_banks > 0 ) { res = make_memory_node(d, kinfo->fdt, addrcells, sizecells, &bootinfo.reserved_mem); if ( res ) return res; } in the log: (XEN) Create memory node (reg size 4, nr cells 4) (XEN) Bank 0: 0x80000000->0xa0000000 (XEN) Create memory node (reg size 4, nr cells 4) (XEN) Bank 0: 0x80000000->0x80040000 next step, understand why "bootinfo.reserved_mem.nr_banks > 0"

Hi there, Following the first message on this mailing list[1], I created the very first merge request for the xen-riscv project here: https://gitlab.com/xen-project/collab/xen-riscv/-/merge_requests/1 It is a very simple patch that makes explicit the extensions we support in our guest interface, rather than forwarding them to the host implementation. The whole guest SBI support has to be cleaned up and improved, but this is a first step. Also, please note that to enable the SBI console on linux you have to set 'hvc' as a console, not 'sbi' as I previously hinted. Thank you, Gianluca [1]: I don't seem to be able to reply to that message as I wasn't subscribed to the list at the time the email was sent. I tried via the web-interface but I appear to have failed miserably.

Hi all, I have something strange in the log. in SBI log we can see that there is only one hart but in the linux log we can see 2 cpus !!! (full log at the end of the message) [ 0.000000] @@@@@ of_irq_init: init /cpus/cpu@0/interrupt-controller ((____ptrval____)), parent 0000000000000000 [ 0.000000] riscv-intc: 64 local interrupts mapped [ 0.000000] @@@@@ of_irq_init: init /cpus/cpu@1/interrupt-controller ((____ptrval____)), parent 0000000000000000 In the console when I do 'ls -al /sys/firmware/devicetree/base/cpus' , I can see 2 cpus -r--r--r-- 1 0 0 4 Jan 1 00:01 #address-cells -r--r--r-- 1 0 0 4 Jan 1 00:01 #size-cells drwxr-xr-x 4 0 0 0 Jan 1 00:01 . drwxr-xr-x 11 0 0 0 Jan 1 00:01 .. drwxr-xr-x 3 0 0 0 Jan 1 00:01 cpu@0 drwxr-xr-x 3 0 0 0 Jan 1 00:01 cpu@1 -r--r--r-- 1 0 0 5 Jan 1 00:01 name -r--r--r-- 1 0 0 4 Jan 1 00:01 timebase-frequency when I do 'cat /proc/cpuinfo' I see just one cpu (hart0) processor : 0 hart : 0 isa : rv64imafdch_zihintpause_zbb_sstc mmu : sv57 mvendorid : 0x0 marchid : 0x7025b mimpid : 0x7025b in the log, we have this line too 'OF: /soc/clint@2000000: could not find phandle 2' and 'phandle' 2 belongs to the cpu0 in the DTS generated by QEMU cpu@0 { phandle = <0x01>; device_type = "cpu"; reg = <0x00>; status = "okay"; compatible = "riscv"; riscv,cboz-block-size = <0x40>; riscv,cbom-block-size = <0x40>; riscv,isa = "rv64imafdch_zicbom_zicboz_zicsr_zifencei_zihintpause_zawrs_zba_zbb_zbc_zbs_sstc_svadu"; mmu-type = "riscv,sv57"; interrupt-controller { #interrupt-cells = <0x01>; interrupt-controller; compatible = "riscv,cpu-intc"; phandle = <0x02>; }; }; I haven't started investigating, but if you have any ideas, they are welcome. The full log: OpenSBI origin_hpsc-v1.1.0-18-g527266a ____ _____ ____ _____ / __ \ / ____| _ \_ _| | | | |_ __ ___ _ __ | (___ | |_) || | | | | | '_ \ / _ \ '_ \ \___ \| _ < | | | |__| | |_) | __/ | | |____) | |_) || |_ \____/| .__/ \___|_| |_|_____/|____/_____| | | |_| Platform Name : riscv-virtio,qemu Platform Features : medeleg Platform HART Count : 1 Platform IPI Device : aclint-mswi Platform Timer Device : aclint-mtimer @ 10000000Hz Platform Console Device : uart8250 Platform HSM Device : --- Platform PMU Device : --- Platform Reboot Device : --- Platform Shutdown Device : --- Firmware Base : 0x80000000 Firmware Size : 240 KB Runtime SBI Version : 1.0 Domain0 Name : root Domain0 Boot HART : 0 Domain0 HARTs : 0* Domain0 Region00 : 0x0000000002000000-0x000000000200ffff (I) Domain0 Region01 : 0x0000000080000000-0x000000008003ffff () Domain0 Region02 : 0x0000000000000000-0xffffffffffffffff (R,W,X) Domain0 Next Address : 0x0000000080200000 Domain0 Next Arg1 : 0x00000000bfe00000 Domain0 Next Mode : S-mode Domain0 SysReset : yes Boot HART ID : 0 Boot HART Domain : root Boot HART Priv Version : v1.12 Boot HART Base ISA : rv64imafdch Boot HART ISA Extensions : time,sstc Boot HART PMP Count : 16 Boot HART PMP Granularity : 4 Boot HART PMP Address Bits: 54 Boot HART MHPM Count : 16 Boot HART MIDELEG : 0x0000000000001666 Boot HART MEDELEG : 0x0000000000f0b509 Xen 4.17.0 (XEN) Xen version 4.17.0 (c71245@...) (riscv64-linux-gcc.br_real (Buildroot 2021.11-4428-g6b6741b) 11.3.0) debug=y Tue Apr 18 07:31:20 PDT 2023 (XEN) Latest ChangeSet: Wed Apr 5 22:24:52 2023 +0100 git:dd09d1f5fd-dirty (XEN) build-id: ab853d712b672bfc47eb36370e40f65dec0067d5 (XEN) RISC-V Xen Boot! (XEN) CSR_STVEC=0x22f680 (XEN) Using scheduler: SMP Credit Scheduler rev2 (credit2) (XEN) Initializing Credit2 scheduler (XEN) load_precision_shift: 18 (XEN) load_window_shift: 30 (XEN) underload_balance_tolerance: 0 (XEN) overload_balance_tolerance: -3 (XEN) runqueues arrangement: socket (XEN) cap enforcement granularity: 10ms (XEN) load tracking window length 1073741824 ns (XEN) Create vCPU with sp=0x37e3f7ee8, pc=0x22f070 (XEN) Scheduling granularity: cpu, 1 CPU per sched-resource (XEN) Initializing Credit2 scheduler (XEN) load_precision_shift: 18 (XEN) load_window_shift: 30 (XEN) underload_balance_tolerance: 0 (XEN) overload_balance_tolerance: -3 (XEN) runqueues arrangement: socket (XEN) cap enforcement granularity:

Why does the list set itself as a reply-to header? That's pretty annoying to be honest, surely the list being on CC is sufficient, no?

Hi all, I'm going to inaugurate by writing the first post. I cloned the xen version and ran it in qemu (version 7.2) and I get the logs attached. Question for Gianluca, do you get to the same point as me (with unsupported SBI errors and an exception at the end)? Thanks, Romain