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From: Michael Trimarchi <michael@...> Upstream linux commit 9a8406ba1a9a29. The D-PHY specification (v1.2) explicitly mentions that the T-CLK-PRE parameter's unit is Unit Interval(UI) and the minimum value is 8. Also, kernel doc of the 'clk_pre' member of struct phy_configure_opts_mipi_dphy mentions that it should be in UI. However, the dphy core driver wrongly sets 'clk_pre' to 8000, which seems to hint that it's in picoseconds. So, let's fix the dphy core driver to correctly reflect the T-CLK-PRE parameter's minimum value according to the D-PHY specification. I'm assuming that all impacted custom drivers shall program values in TxByteClkHS cycles into hardware for the T-CLK-PRE parameter. The D-PHY specification mentions that the frequency of TxByteClkHS is exactly 1/8 the High-Speed(HS) bit rate(each HS bit consumes one UI). So, relevant custom driver code is changed to program those values as DIV_ROUND_UP(cfg->clk_pre, BITS_PER_BYTE), then. Note that I've only tested the patch with RM67191 DSI panel on i.MX8mq EVK. Help is needed to test with other i.MX8mq, Meson and Rockchip platforms, as I don't have the hardwares. Tested-by: Liu Ying <victor.liu@...> # RM67191 DSI panel on i.MX8mq EVK Reviewed-by: Andrzej Hajda <andrzej.hajda@...> Reviewed-by: Neil Armstrong <narmstrong@...> # for phy-meson-axg-mipi-dphy.c Tested-by: Neil Armstrong <narmstrong@...> # for phy-meson-axg-mipi-dphy.c Tested-by: Guido Günther <agx@...> # Librem 5 (imx8mq) with it's rather picky panel Reviewed-by: Laurent Pinchart <laurent.pinchart@...> Signed-off-by: Liu Ying <victor.liu@...> Link: https://lore.kernel.org/r/20220124024007.1465018-1-victor.liu@... Signed-off-by: Vinod Koul <vkoul@...> Signed-off-by: Michael Trimarchi <michael@...> Signed-off-by: Dario Binacchi <dario.binacchi@...> --- drivers/phy/meson-axg-mipi-dphy.c | 2 +- drivers/phy/phy-core-mipi-dphy.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/phy/meson-axg-mipi-dphy.c b/drivers/phy/meson-axg-mipi-dphy.c index 3f89de19970b..fb10ccca6ac1 100644 --- a/drivers/phy/meson-axg-mipi-dphy.c +++ b/drivers/phy/meson-axg-mipi-dphy.c @@ -237,7 +237,7 @@ static int phy_meson_axg_mipi_dphy_power_on(struct phy *phy) (DIV_ROUND_UP(priv->config.clk_zero, temp) << 16) | (DIV_ROUND_UP(priv->config.clk_prepare, temp) << 24)); regmap_write(priv->regmap, MIPI_DSI_CLK_TIM1, - DIV_ROUND_UP(priv->config.clk_pre, temp)); + DIV_ROUND_UP(priv->config.clk_pre, BITS_PER_BYTE)); regmap_write(priv->regmap, MIPI_DSI_HS_TIM, DIV_ROUND_UP(priv->config.hs_exit, temp) | diff --git a/drivers/phy/phy-core-mipi-dphy.c b/drivers/phy/phy-core-mipi-dphy.c index 79cab9125002..27cff85709d9 100644 --- a/drivers/phy/phy-core-mipi-dphy.c +++ b/drivers/phy/phy-core-mipi-dphy.c @@ -36,7 +36,7 @@ static int phy_mipi_dphy_calc_config(unsigned long pixel_clock, cfg->clk_miss = 0; cfg->clk_post = 60000 + 52 * ui; - cfg->clk_pre = 8000; + cfg->clk_pre = 8; cfg->clk_prepare = 38000; cfg->clk_settle = 95000; cfg->clk_term_en = 0; -- 2.43.0

The necessary changes were made in U-Boot to easily support EFI Capsules Update and be compliant with Arm SystemReady SR. Let's add support for the libretech-ac/AML-S805X-CC since it's an easy well-supported target having a dedicated SPI Flash to store U-Boot. Signed-off-by: Neil Armstrong <neil.armstrong@...> --- Neil Armstrong (2): board: libretech-ac: move board support into dedicated directory board: libre-computer: aml-s805-cc: Enable capsule updates board/amlogic/p212/MAINTAINERS | 2 - board/libre-computer/aml-s805x-ac/MAINTAINERS | 8 ++++ board/libre-computer/aml-s805x-ac/Makefile | 6 +++ board/libre-computer/aml-s805x-ac/aml-s805x-ac.c | 61 ++++++++++++++++++++++++ configs/libretech-ac_defconfig | 7 +++ 5 files changed, 82 insertions(+), 2 deletions(-) --- base-commit: df84c019c46e6833cc79385bdb23efba4882c09d change-id: 20240916-u-boot-topic-dynamic-uuid-a871c25236a4 Best regards, -- Neil Armstrong <neil.armstrong@...>

Since the aml-s805-cc works well using EFI, and now the capsule updates backend has been merged, let's enable the missing configs and add the required structures to support it. The GUID is dynamically generated for the board, to get it: => efidebug capsule esrt ======================================== ESRT: fw_resource_count=1 ESRT: fw_resource_count_max=1 ESRT: fw_resource_version=1 [entry 0]============================== ESRT: fw_class=B8079027-9B2C-57D4-86AA-CC782ADA598C ESRT: fw_type=unknown ESRT: fw_version=0 ESRT: lowest_supported_fw_version=0 ESRT: capsule_flags=0 ESRT: last_attempt_version=0 ESRT: last_attempt_status=success ======================================== On the host (with the aml_encrypt_gxl result binary): $ eficapsule --guid B8079027-9B2C-57D4-86AA-CC782ADA598C -i 1 u-boot.bin u-boot.cap On the board (from USB disk containing u-boot.cap at root): => load usb 0:1 $kernel_addr_r u-boot.cap => efidebug capsule update $kernel_addr_r The binary will then be flashed on the SPI. Reviewed-by: Ilias Apalodimas <ilias.apalodimas@...> Signed-off-by: Neil Armstrong <neil.armstrong@...> --- board/libre-computer/aml-s805x-ac/aml-s805x-ac.c | 24 ++++++++++++++++++++++++ configs/libretech-ac_defconfig | 6 ++++++ 2 files changed, 30 insertions(+) diff --git a/board/libre-computer/aml-s805x-ac/aml-s805x-ac.c b/board/libre-computer/aml-s805x-ac/aml-s805x-ac.c index ae9834c0bf8..94cf5b4361f 100644 --- a/board/libre-computer/aml-s805x-ac/aml-s805x-ac.c +++ b/board/libre-computer/aml-s805x-ac/aml-s805x-ac.c @@ -8,6 +8,7 @@ #include <env.h> #include <init.h> #include <net.h> +#include <efi_loader.h> #include <asm/io.h> #include <asm/arch/gx.h> #include <asm/arch/sm.h> @@ -19,6 +20,29 @@ #define EFUSE_MAC_OFFSET 52 #define EFUSE_MAC_SIZE 6 +struct efi_fw_image fw_images[] = { + { + .fw_name = u"AML_S805X_AC_BOOT", + .image_index = 1, + }, +}; + +struct efi_capsule_update_info update_info = { + .dfu_string = "sf 0:0=u-boot-bin raw 0 0x10000", + .num_images = ARRAY_SIZE(fw_images), + .images = fw_images, +}; + +#if IS_ENABLED(CONFIG_SET_DFU_ALT_INFO) +void set_dfu_alt_info(char *interface, char *devstr) +{ + if (strcmp(interface, "ram") == 0) + env_set("dfu_alt_info", "fitimage ram 0x08080000 0x4000000"); + else if (IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT)) + env_set("dfu_alt_info", update_info.dfu_string); +} +#endif + int misc_init_r(void) { u8 mac_addr[EFUSE_MAC_SIZE + 1]; diff --git a/configs/libretech-ac_defconfig b/configs/libretech-ac_defconfig index 11d9795e05d..7763a14f203 100644 --- a/configs/libretech-ac_defconfig +++ b/configs/libretech-ac_defconfig @@ -35,6 +35,7 @@ CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_IMI is not set CONFIG_CMD_ADC=y CONFIG_CMD_DFU=y +CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_GPIO=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -42,6 +43,7 @@ CONFIG_CMD_SF_TEST=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_EFIDEBUG=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y @@ -49,6 +51,8 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SARADC_MESON=y CONFIG_DFU_RAM=y +CONFIG_DFU_SF=y +CONFIG_SET_DFU_ALT_INFO=y CONFIG_MMC_MESON_GX=y CONFIG_MTD=y CONFIG_DM_MTD=y @@ -98,3 +102,5 @@ CONFIG_VIDEO_BMP_RLE8=y CONFIG_BMP_16BPP=y CONFIG_BMP_24BPP=y CONFIG_BMP_32BPP=y +CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y +CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y -- 2.34.1

The libretech-ac aka aml-s805x-ac supports mainline U-boot from a dedicated SPI flash, move the board support into a dedicated vendor/board subdirectory in order to support vendor specific customization. It also aligns with the vendor downstream changes. Signed-off-by: Neil Armstrong <neil.armstrong@...> --- board/amlogic/p212/MAINTAINERS | 2 - board/libre-computer/aml-s805x-ac/MAINTAINERS | 8 ++++ board/libre-computer/aml-s805x-ac/Makefile | 6 +++ board/libre-computer/aml-s805x-ac/aml-s805x-ac.c | 47 ++++++++++++++++++++++++ configs/libretech-ac_defconfig | 2 + 5 files changed, 63 insertions(+), 2 deletions(-) diff --git a/board/amlogic/p212/MAINTAINERS b/board/amlogic/p212/MAINTAINERS index b2e3205fdf0..e73a4e52c1f 100644 --- a/board/amlogic/p212/MAINTAINERS +++ b/board/amlogic/p212/MAINTAINERS @@ -5,11 +5,9 @@ L: [email protected] F: board/amlogic/p212/ F: include/configs/p212.h F: configs/khadas-vim_defconfig -F: configs/libretech-ac_defconfig F: configs/libretech-cc_defconfig F: configs/libretech-cc_v2_defconfig F: configs/p212_defconfig F: doc/board/amlogic/p212.rst -F: doc/board/amlogic/libretech-ac.rst F: doc/board/amlogic/libretech-cc.rst F: doc/board/amlogic/khadas-vim.rst diff --git a/board/libre-computer/aml-s805x-ac/MAINTAINERS b/board/libre-computer/aml-s805x-ac/MAINTAINERS new file mode 100644 index 00000000000..7cbc08aeb6c --- /dev/null +++ b/board/libre-computer/aml-s805x-ac/MAINTAINERS @@ -0,0 +1,8 @@ +LIBRE-COMPUTER AML-S805X-AC +M: Neil Armstrong <neil.armstrong@...> +S: Maintained +L: [email protected] +F: board/amlogic/aml-s805x-ac/ +F: include/configs/libretech-ac.h +F: configs/libretech-ac_defconfig +F: doc/board/amlogic/libretech-ac.rst diff --git a/board/libre-computer/aml-s805x-ac/Makefile b/board/libre-computer/aml-s805x-ac/Makefile new file mode 100644 index 00000000000..b4367ea522b --- /dev/null +++ b/board/libre-computer/aml-s805x-ac/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2016 BayLibre, SAS +# Author: Neil Armstrong <narmstrong@...> + +obj-y := aml-s805x-ac.o diff --git a/board/libre-computer/aml-s805x-ac/aml-s805x-ac.c b/board/libre-computer/aml-s805x-ac/aml-s805x-ac.c new file mode 100644 index 00000000000..ae9834c0bf8 --- /dev/null +++ b/board/libre-computer/aml-s805x-ac/aml-s805x-ac.c @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2016 BayLibre, SAS + * Author: Neil Armstrong <narmstrong@...> + */ + +#include <dm.h> +#include <env.h> +#include <init.h> +#include <net.h> +#include <asm/io.h> +#include <asm/arch/gx.h> +#include <asm/arch/sm.h> +#include <asm/arch/eth.h> +#include <asm/arch/mem.h> + +#define EFUSE_SN_OFFSET 20 +#define EFUSE_SN_SIZE 16 +#define EFUSE_MAC_OFFSET 52 +#define EFUSE_MAC_SIZE 6 + +int misc_init_r(void) +{ + u8 mac_addr[EFUSE_MAC_SIZE + 1]; + char serial[EFUSE_SN_SIZE + 1]; + ssize_t len; + + if (!eth_env_get_enetaddr("ethaddr", mac_addr)) { + len = meson_sm_read_efuse(EFUSE_MAC_OFFSET, + mac_addr, EFUSE_MAC_SIZE); + mac_addr[len] = '\0'; + if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr)) + eth_env_set_enetaddr("ethaddr", mac_addr); + else + meson_generate_serial_ethaddr(); + } + + if (!env_get("serial#")) { + len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial, + EFUSE_SN_SIZE); + serial[len] = '\0'; + if (len == EFUSE_SN_SIZE) + env_set("serial#", serial); + } + + return 0; +} diff --git a/configs/libretech-ac_defconfig b/configs/libretech-ac_defconfig index 6ad04570022..11d9795e05d 100644 --- a/configs/libretech-ac_defconfig +++ b/configs/libretech-ac_defconfig @@ -1,5 +1,7 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="libretech-ac" +CONFIG_SYS_VENDOR="libre-computer" +CONFIG_SYS_BOARD="aml-s805x-ac" CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 -- 2.34.1

The libretech-ac aka aml-s805x-ac supports mainline U-boot from a dedicated SPI flash, move the board support into a dedicated vendor/board subdirectory in order to support vendor specific customization. It also aligns with the vendor downstream changes. Signed-off-by: Neil Armstrong <neil.armstrong@...> --- board/amlogic/p212/MAINTAINERS | 2 - board/libre-computer/aml-s805x-ac/MAINTAINERS | 8 ++++ board/libre-computer/aml-s805x-ac/Makefile | 6 +++ board/libre-computer/aml-s805x-ac/aml-s805x-ac.c | 47 ++++++++++++++++++++++++ configs/libretech-ac_defconfig | 2 + 5 files changed, 63 insertions(+), 2 deletions(-) diff --git a/board/amlogic/p212/MAINTAINERS b/board/amlogic/p212/MAINTAINERS index b2e3205fdf0..e73a4e52c1f 100644 --- a/board/amlogic/p212/MAINTAINERS +++ b/board/amlogic/p212/MAINTAINERS @@ -5,11 +5,9 @@ L: [email protected] F: board/amlogic/p212/ F: include/configs/p212.h F: configs/khadas-vim_defconfig -F: configs/libretech-ac_defconfig F: configs/libretech-cc_defconfig F: configs/libretech-cc_v2_defconfig F: configs/p212_defconfig F: doc/board/amlogic/p212.rst -F: doc/board/amlogic/libretech-ac.rst F: doc/board/amlogic/libretech-cc.rst F: doc/board/amlogic/khadas-vim.rst diff --git a/board/libre-computer/aml-s805x-ac/MAINTAINERS b/board/libre-computer/aml-s805x-ac/MAINTAINERS new file mode 100644 index 00000000000..7cbc08aeb6c --- /dev/null +++ b/board/libre-computer/aml-s805x-ac/MAINTAINERS @@ -0,0 +1,8 @@ +LIBRE-COMPUTER AML-S805X-AC +M: Neil Armstrong <neil.armstrong@...> +S: Maintained +L: [email protected] +F: board/amlogic/aml-s805x-ac/ +F: include/configs/libretech-ac.h +F: configs/libretech-ac_defconfig +F: doc/board/amlogic/libretech-ac.rst diff --git a/board/libre-computer/aml-s805x-ac/Makefile b/board/libre-computer/aml-s805x-ac/Makefile new file mode 100644 index 00000000000..b4367ea522b --- /dev/null +++ b/board/libre-computer/aml-s805x-ac/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2016 BayLibre, SAS +# Author: Neil Armstrong <narmstrong@...> + +obj-y := aml-s805x-ac.o diff --git a/board/libre-computer/aml-s805x-ac/aml-s805x-ac.c b/board/libre-computer/aml-s805x-ac/aml-s805x-ac.c new file mode 100644 index 00000000000..ae9834c0bf8 --- /dev/null +++ b/board/libre-computer/aml-s805x-ac/aml-s805x-ac.c @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2016 BayLibre, SAS + * Author: Neil Armstrong <narmstrong@...> + */ + +#include <dm.h> +#include <env.h> +#include <init.h> +#include <net.h> +#include <asm/io.h> +#include <asm/arch/gx.h> +#include <asm/arch/sm.h> +#include <asm/arch/eth.h> +#include <asm/arch/mem.h> + +#define EFUSE_SN_OFFSET 20 +#define EFUSE_SN_SIZE 16 +#define EFUSE_MAC_OFFSET 52 +#define EFUSE_MAC_SIZE 6 + +int misc_init_r(void) +{ + u8 mac_addr[EFUSE_MAC_SIZE + 1]; + char serial[EFUSE_SN_SIZE + 1]; + ssize_t len; + + if (!eth_env_get_enetaddr("ethaddr", mac_addr)) { + len = meson_sm_read_efuse(EFUSE_MAC_OFFSET, + mac_addr, EFUSE_MAC_SIZE); + mac_addr[len] = '\0'; + if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr)) + eth_env_set_enetaddr("ethaddr", mac_addr); + else + meson_generate_serial_ethaddr(); + } + + if (!env_get("serial#")) { + len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial, + EFUSE_SN_SIZE); + serial[len] = '\0'; + if (len == EFUSE_SN_SIZE) + env_set("serial#", serial); + } + + return 0; +} diff --git a/configs/libretech-ac_defconfig b/configs/libretech-ac_defconfig index 6ad04570022..11d9795e05d 100644 --- a/configs/libretech-ac_defconfig +++ b/configs/libretech-ac_defconfig @@ -1,5 +1,7 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="libretech-ac" +CONFIG_SYS_VENDOR="libre-computer" +CONFIG_SYS_BOARD="aml-s805x-ac" CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 -- 2.34.1

Hi Tom, A simple set of changes to allow using the bootrom NAND pages, ported from Linux. Thanks, Neil The following changes since commit ee2af844ba1b27b2e959c4e649e4b769fbeb4074: Merge tag 'efi-2024-10-rc4' of https://source.denx.de/u-boot/custodians/u-boot-efi (2024-08-24 14:03:28 -0600) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-amlogic.git tags/u-boot-amlogic-next-20240902 for you to fetch changes up to 35ff967a99e97b523732096628bdbc78758922f6: mtd: rawnand: meson: read/write access for boot ROM pages (2024-08-28 16:05:45 +0200) ---------------------------------------------------------------- - meson_nand: R/W support for pages used by boot ROM ---------------------------------------------------------------- Arseniy Krasnov (3): mtd: rawnand: nand_base: support for 'NAND_IS_BOOT_MEDIUM' flag mtd: rawnand: meson: refactor use of 'meson_nfc_cmd_access()' mtd: rawnand: meson: read/write access for boot ROM pages drivers/mtd/nand/raw/meson_nand.c | 84 ++++++++++++++++++++++++++------------- drivers/mtd/nand/raw/nand_base.c | 3 ++ include/linux/mtd/rawnand.h | 5 +++ 3 files changed, 65 insertions(+), 27 deletions(-)

Patchset is based on patchset for Linux (today merged to nand-next): https://lore.kernel.org/linux-mtd/20240507230903.3399594-1-avkrasnov@.../ Here is description from it: > Amlogic's boot ROM code needs that some pages on NAND must be written > in special "short" ECC mode with scrambling enabled. Such pages: > 1) Contain some metadata about hardware. > 2) Located with some interval starting from 0 offset, until some > specified offset. Interval and second offset are set in the > device tree. > > This patchset adds R/W support for such pages. To enable it we can setup > it in dts: > > nand-is-boot-medium; > amlogic,boot-pages = <1024>; > amlogic,boot-page-step = <128>; > > It means that each 128th page in range 0 to 1024 pages will be accessed > in special mode ("short" ECC + scrambling). In practice this feature is > needed when we want to update first block of NAND - driver will enable > required mode by itself using value from device tree. The only difference is that patchset for Linux updates DT bindings, while this adds NAND_IS_BOOT_MEDIUM flag support. Changelog: v1 -> v2: * Pls see per-patch changelog. v2 -> v3: * Pls see per-patch changelog. Arseniy Krasnov (3): mtd: rawnand: nand_base: support for 'NAND_IS_BOOT_MEDIUM' flag mtd: rawnand: meson: refactor use of 'meson_nfc_cmd_access()' mtd: rawnand: meson: read/write access for boot ROM pages drivers/mtd/nand/raw/meson_nand.c | 84 +++++++++++++++++++++---------- drivers/mtd/nand/raw/nand_base.c | 3 ++ include/linux/mtd/rawnand.h | 5 ++ 3 files changed, 65 insertions(+), 27 deletions(-) -- 2.30.1

Boot ROM on Meson needs some pages to be read/written in a special mode: 384 byte ECC mode (so called "short" by Amlogic) and with scrambling enabled. Such pages are located on the chip in the following way (for example): [ p0 ][ p1 ][ p2 ][ p3 ][ p4 ][ p5 ][ p6 ][ p7 ] ... [ pN ] ^ ^ ^ ^ pX is page number "X". "^" means "special" page used by boot ROM - e.g. every 2nd page in the range of [0, 7]. Step (2 here) and last page in range is read from the device tree. Signed-off-by: Arseniy Krasnov <avkrasnov@...> Reviewed-by: Michael Trimarchi <michael@...> --- drivers/mtd/nand/raw/meson_nand.c | 56 +++++++++++++++++++++++++------ 1 file changed, 46 insertions(+), 10 deletions(-) diff --git a/drivers/mtd/nand/raw/meson_nand.c b/drivers/mtd/nand/raw/meson_nand.c index 2d77ee51ce..28c851f103 100644 --- a/drivers/mtd/nand/raw/meson_nand.c +++ b/drivers/mtd/nand/raw/meson_nand.c @@ -39,6 +39,7 @@ #define NFC_CMD_RB BIT(20) #define NFC_CMD_SCRAMBLER_ENABLE BIT(19) #define NFC_CMD_SCRAMBLER_DISABLE 0 +#define NFC_CMD_SHORTMODE_ENABLE 1 #define NFC_CMD_SHORTMODE_DISABLE 0 #define NFC_CMD_RB_INT BIT(14) #define NFC_CMD_RB_INT_NO_PIN ((0xb << 10) | BIT(18) | BIT(16)) @@ -77,6 +78,8 @@ #define DMA_DIR(dir) ((dir) ? NFC_CMD_N2M : NFC_CMD_M2N) +#define NFC_SHORT_MODE_ECC_SZ 384 + #define ECC_CHECK_RETURN_FF -1 #define NAND_CE0 (0xe << 10) @@ -140,6 +143,8 @@ struct meson_nfc_nand_chip { struct list_head node; struct nand_chip nand; + u32 boot_pages; + u32 boot_page_step; u32 bch_mode; u8 *data_buf; @@ -228,33 +233,46 @@ static void meson_nfc_cmd_seed(const struct meson_nfc *nfc, u32 seed) nfc->reg_base + NFC_REG_CMD); } +static int meson_nfc_is_boot_page(struct nand_chip *nand, int page) +{ + const struct meson_nfc_nand_chip *meson_chip = to_meson_nand(nand); + + return (nand->options & NAND_IS_BOOT_MEDIUM) && + !(page % meson_chip->boot_page_step) && + (page < meson_chip->boot_pages); +} + static void meson_nfc_cmd_access(struct nand_chip *nand, bool raw, bool dir, int page) { + const struct meson_nfc_nand_chip *meson_chip = to_meson_nand(nand); struct mtd_info *mtd = nand_to_mtd(nand); const struct meson_nfc *nfc = nand_get_controller_data(mtd_to_nand(mtd)); - const struct meson_nfc_nand_chip *meson_chip = to_meson_nand(nand); - u32 bch = meson_chip->bch_mode, cmd; int len = mtd->writesize, pagesize, pages; unsigned int scrambler; + u32 cmd; if (nand->options & NAND_NEED_SCRAMBLING) scrambler = NFC_CMD_SCRAMBLER_ENABLE; else scrambler = NFC_CMD_SCRAMBLER_DISABLE; - pagesize = nand->ecc.size; - if (raw) { len = mtd->writesize + mtd->oobsize; cmd = len | scrambler | DMA_DIR(dir); - writel(cmd, nfc->reg_base + NFC_REG_CMD); - return; - } + } else if (meson_nfc_is_boot_page(nand, page)) { + pagesize = NFC_SHORT_MODE_ECC_SZ >> 3; + pages = mtd->writesize / 512; - pages = len / nand->ecc.size; + scrambler = NFC_CMD_SCRAMBLER_ENABLE; + cmd = CMDRWGEN(DMA_DIR(dir), scrambler, NFC_ECC_BCH8_1K, + NFC_CMD_SHORTMODE_ENABLE, pagesize, pages); + } else { + pagesize = nand->ecc.size >> 3; + pages = len / nand->ecc.size; - cmd = CMDRWGEN(DMA_DIR(dir), scrambler, bch, - NFC_CMD_SHORTMODE_DISABLE, pagesize, pages); + cmd = CMDRWGEN(DMA_DIR(dir), scrambler, meson_chip->bch_mode, + NFC_CMD_SHORTMODE_DISABLE, pagesize, pages); + } if (scrambler == NFC_CMD_SCRAMBLER_ENABLE) meson_nfc_cmd_seed(nfc, page); @@ -1131,6 +1149,24 @@ static int meson_nfc_nand_chip_init(struct udevice *dev, struct meson_nfc *nfc, goto err_chip_buf_free; } + if (nand->options & NAND_IS_BOOT_MEDIUM) { + ret = ofnode_read_u32(node, "amlogic,boot-pages", + &meson_chip->boot_pages); + if (ret) { + dev_err(dev, "could not retrieve 'amlogic,boot-pages' property: %d", + ret); + goto err_chip_buf_free; + } + + ret = ofnode_read_u32(node, "amlogic,boot-page-step", + &meson_chip->boot_page_step); + if (ret) { + dev_err(dev, "could not retrieve 'amlogic,boot-page-step' property: %d", + ret); + goto err_chip_buf_free; + } + } + ret = nand_register(0, mtd); if (ret) { dev_err(dev, "'nand_register()' failed: %d\n", ret); -- 2.30.1

Boot ROM on Meson needs some pages to be read/written in a special mode: 384 byte ECC mode (so called "short" by Amlogic) and with scrambling enabled. Such pages are located on the chip in the following way (for example): [ p0 ][ p1 ][ p2 ][ p3 ][ p4 ][ p5 ][ p6 ][ p7 ] ... [ pN ] ^ ^ ^ ^ pX is page number "X". "^" means "special" page used by boot ROM - e.g. every 2nd page in the range of [0, 7]. Step (2 here) and last page in range is read from the device tree. Signed-off-by: Arseniy Krasnov <avkrasnov@...> --- drivers/mtd/nand/raw/meson_nand.c | 56 +++++++++++++++++++++++++------ 1 file changed, 46 insertions(+), 10 deletions(-) diff --git a/drivers/mtd/nand/raw/meson_nand.c b/drivers/mtd/nand/raw/meson_nand.c index 19f005202b..54ea035d8d 100644 --- a/drivers/mtd/nand/raw/meson_nand.c +++ b/drivers/mtd/nand/raw/meson_nand.c @@ -40,6 +40,7 @@ #define NFC_CMD_RB BIT(20) #define NFC_CMD_SCRAMBLER_ENABLE BIT(19) #define NFC_CMD_SCRAMBLER_DISABLE 0 +#define NFC_CMD_SHORTMODE_ENABLE 1 #define NFC_CMD_SHORTMODE_DISABLE 0 #define NFC_CMD_RB_INT BIT(14) #define NFC_CMD_RB_INT_NO_PIN ((0xb << 10) | BIT(18) | BIT(16)) @@ -78,6 +79,8 @@ #define DMA_DIR(dir) ((dir) ? NFC_CMD_N2M : NFC_CMD_M2N) +#define NFC_SHORT_MODE_ECC_SZ 384 + #define ECC_CHECK_RETURN_FF -1 #define NAND_CE0 (0xe << 10) @@ -141,6 +144,8 @@ struct meson_nfc_nand_chip { struct list_head node; struct nand_chip nand; + u32 boot_pages; + u32 boot_page_step; u32 bch_mode; u8 *data_buf; @@ -229,33 +234,46 @@ static void meson_nfc_cmd_seed(const struct meson_nfc *nfc, u32 seed) nfc->reg_base + NFC_REG_CMD); } +static int meson_nfc_is_boot_page(struct nand_chip *nand, int page) +{ + const struct meson_nfc_nand_chip *meson_chip = to_meson_nand(nand); + + return (nand->options & NAND_IS_BOOT_MEDIUM) && + !(page % meson_chip->boot_page_step) && + (page < meson_chip->boot_pages); +} + static void meson_nfc_cmd_access(struct nand_chip *nand, bool raw, bool dir, int page) { + const struct meson_nfc_nand_chip *meson_chip = to_meson_nand(nand); struct mtd_info *mtd = nand_to_mtd(nand); const struct meson_nfc *nfc = nand_get_controller_data(mtd_to_nand(mtd)); - const struct meson_nfc_nand_chip *meson_chip = to_meson_nand(nand); - u32 bch = meson_chip->bch_mode, cmd; int len = mtd->writesize, pagesize, pages; int scrambler; + u32 cmd; if (nand->options & NAND_NEED_SCRAMBLING) scrambler = NFC_CMD_SCRAMBLER_ENABLE; else scrambler = NFC_CMD_SCRAMBLER_DISABLE; - pagesize = nand->ecc.size; - if (raw) { len = mtd->writesize + mtd->oobsize; cmd = len | scrambler | DMA_DIR(dir); - writel(cmd, nfc->reg_base + NFC_REG_CMD); - return; - } + } else if (meson_nfc_is_boot_page(nand, page)) { + pagesize = NFC_SHORT_MODE_ECC_SZ >> 3; + pages = mtd->writesize / 512; - pages = len / nand->ecc.size; + scrambler = NFC_CMD_SCRAMBLER_ENABLE; + cmd = CMDRWGEN(DMA_DIR(dir), scrambler, NFC_ECC_BCH8_1K, + NFC_CMD_SHORTMODE_ENABLE, pagesize, pages); + } else { + pagesize = nand->ecc.size >> 3; + pages = len / nand->ecc.size; - cmd = CMDRWGEN(DMA_DIR(dir), scrambler, bch, - NFC_CMD_SHORTMODE_DISABLE, pagesize, pages); + cmd = CMDRWGEN(DMA_DIR(dir), scrambler, meson_chip->bch_mode, + NFC_CMD_SHORTMODE_DISABLE, pagesize, pages); + } if (scrambler == NFC_CMD_SCRAMBLER_ENABLE) meson_nfc_cmd_seed(nfc, page); @@ -1132,6 +1150,24 @@ static int meson_nfc_nand_chip_init(struct udevice *dev, struct meson_nfc *nfc, goto err_chip_buf_free; } + if (nand->options & NAND_IS_BOOT_MEDIUM) { + ret = ofnode_read_u32(node, "amlogic,boot-pages", + &meson_chip->boot_pages); + if (ret) { + dev_err(dev, "could not retrieve 'amlogic,boot-pages' property: %d", + ret); + goto err_chip_buf_free; + } + + ret = ofnode_read_u32(node, "amlogic,boot-page-step", + &meson_chip->boot_page_step); + if (ret) { + dev_err(dev, "could not retrieve 'amlogic,boot-page-step' property: %d", + ret); + goto err_chip_buf_free; + } + } + ret = nand_register(0, mtd); if (ret) { dev_err(dev, "'nand_register()' failed: %d\n", ret); -- 2.30.1

Based on Linux kernel: commit f922bd798bb9 ("mtd: rawnand: add an option to specify NAND chip as a boot device") Allow to define a NAND chip as a boot device. This can be helpful for the selection of the ECC algorithm and strength in case the boot ROM supports only a subset of controller provided options. Signed-off-by: Arseniy Krasnov <avkrasnov@...> Reviewed-by: Michael Trimarchi <michael@...> --- Changelog: v1 -> v2: * Place 'NAND_IS_BOOT_MEDIUM' according its numerical value. v2 -> v3: * Rebase on last master. drivers/mtd/nand/raw/nand_base.c | 3 +++ include/linux/mtd/rawnand.h | 5 +++++ 2 files changed, 8 insertions(+) diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c index 688d17ba3c..a7474574f8 100644 --- a/drivers/mtd/nand/raw/nand_base.c +++ b/drivers/mtd/nand/raw/nand_base.c @@ -4458,6 +4458,9 @@ static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, ofnode nod if (ret == 16) chip->options |= NAND_BUSWIDTH_16; + if (ofnode_read_bool(node, "nand-is-boot-medium")) + chip->options |= NAND_IS_BOOT_MEDIUM; + if (ofnode_read_bool(node, "nand-on-flash-bbt")) chip->bbt_options |= NAND_BBT_USE_FLASH; diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index 4abaf4734c..0e7b5f852c 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -248,6 +248,11 @@ enum nand_ecc_algo { * kmap'ed, vmalloc'ed highmem buffers being passed from upper layers */ #define NAND_USE_BOUNCE_BUFFER 0x00100000 +/* + * Whether the NAND chip is a boot medium. Drivers might use this information + * to select ECC algorithms supported by the boot ROM or similar restrictions. + */ +#define NAND_IS_BOOT_MEDIUM 0x00400000 /* * Do not try to tweak the timings at runtime. This is needed when the -- 2.30.1

Move call 'meson_nfc_cmd_seed()' and check for 'NAND_NEED_SCRAMBLING' to 'meson_nfc_cmd_access()', thus removing code duplication. Signed-off-by: Arseniy Krasnov <avkrasnov@...> Reviewed-by: Michael Trimarchi <michael@...> --- Changelog: v2 -> v3: * Declare 'scrambler' as 'unsigned int'. drivers/mtd/nand/raw/meson_nand.c | 30 ++++++++++++------------------ 1 file changed, 12 insertions(+), 18 deletions(-) diff --git a/drivers/mtd/nand/raw/meson_nand.c b/drivers/mtd/nand/raw/meson_nand.c index 12499a7947..2d77ee51ce 100644 --- a/drivers/mtd/nand/raw/meson_nand.c +++ b/drivers/mtd/nand/raw/meson_nand.c @@ -228,14 +228,19 @@ static void meson_nfc_cmd_seed(const struct meson_nfc *nfc, u32 seed) nfc->reg_base + NFC_REG_CMD); } -static void meson_nfc_cmd_access(struct nand_chip *nand, bool raw, bool dir, - int scrambler) +static void meson_nfc_cmd_access(struct nand_chip *nand, bool raw, bool dir, int page) { struct mtd_info *mtd = nand_to_mtd(nand); const struct meson_nfc *nfc = nand_get_controller_data(mtd_to_nand(mtd)); const struct meson_nfc_nand_chip *meson_chip = to_meson_nand(nand); u32 bch = meson_chip->bch_mode, cmd; int len = mtd->writesize, pagesize, pages; + unsigned int scrambler; + + if (nand->options & NAND_NEED_SCRAMBLING) + scrambler = NFC_CMD_SCRAMBLER_ENABLE; + else + scrambler = NFC_CMD_SCRAMBLER_DISABLE; pagesize = nand->ecc.size; @@ -251,6 +256,9 @@ static void meson_nfc_cmd_access(struct nand_chip *nand, bool raw, bool dir, cmd = CMDRWGEN(DMA_DIR(dir), scrambler, bch, NFC_CMD_SHORTMODE_DISABLE, pagesize, pages); + if (scrambler == NFC_CMD_SCRAMBLER_ENABLE) + meson_nfc_cmd_seed(nfc, page); + writel(cmd, nfc->reg_base + NFC_REG_CMD); } @@ -565,14 +573,7 @@ static int meson_nfc_write_page_sub(struct nand_chip *nand, return ret; } - if (nand->options & NAND_NEED_SCRAMBLING) { - meson_nfc_cmd_seed(nfc, page); - meson_nfc_cmd_access(nand, raw, DIRWRITE, - NFC_CMD_SCRAMBLER_ENABLE); - } else { - meson_nfc_cmd_access(nand, raw, DIRWRITE, - NFC_CMD_SCRAMBLER_DISABLE); - } + meson_nfc_cmd_access(nand, raw, DIRWRITE, page); cmd = nfc->param.chip_select | NFC_CMD_CLE | NAND_CMD_PAGEPROG; writel(cmd, nfc->reg_base + NFC_REG_CMD); @@ -643,14 +644,7 @@ static int meson_nfc_read_page_sub(struct nand_chip *nand, if (ret) return ret; - if (nand->options & NAND_NEED_SCRAMBLING) { - meson_nfc_cmd_seed(nfc, page); - meson_nfc_cmd_access(nand, raw, DIRREAD, - NFC_CMD_SCRAMBLER_ENABLE); - } else { - meson_nfc_cmd_access(nand, raw, DIRREAD, - NFC_CMD_SCRAMBLER_DISABLE); - } + meson_nfc_cmd_access(nand, raw, DIRREAD, page); meson_nfc_wait_dma_finish(nfc); meson_nfc_check_ecc_pages_valid(nfc, nand, raw); -- 2.30.1

Patchset is based on patchset for Linux (today merged to nand-next): https://lore.kernel.org/linux-mtd/20240507230903.3399594-1-avkrasnov@.../ Here is description from it: > Amlogic's boot ROM code needs that some pages on NAND must be written > in special "short" ECC mode with scrambling enabled. Such pages: > 1) Contain some metadata about hardware. > 2) Located with some interval starting from 0 offset, until some > specified offset. Interval and second offset are set in the > device tree. > > This patchset adds R/W support for such pages. To enable it we can setup > it in dts: > > nand-is-boot-medium; > amlogic,boot-pages = <1024>; > amlogic,boot-page-step = <128>; > > It means that each 128th page in range 0 to 1024 pages will be accessed > in special mode ("short" ECC + scrambling). In practice this feature is > needed when we want to update first block of NAND - driver will enable > required mode by itself using value from device tree. The only difference is that patchset for Linux updates DT bindings, while this adds NAND_IS_BOOT_MEDIUM flag support. Changelog: v1 -> v2: * Pls see per-patch changelog. Arseniy Krasnov (3): mtd: rawnand: nand_base: support for 'NAND_IS_BOOT_MEDIUM' flag mtd: rawnand: meson: refactor use of 'meson_nfc_cmd_access()' mtd: rawnand: meson: read/write access for boot ROM pages drivers/mtd/nand/raw/meson_nand.c | 84 +++++++++++++++++++++---------- drivers/mtd/nand/raw/nand_base.c | 3 ++ include/linux/mtd/rawnand.h | 5 ++ 3 files changed, 65 insertions(+), 27 deletions(-) -- 2.30.1

Move call 'meson_nfc_cmd_seed()' and check for 'NAND_NEED_SCRAMBLING' to 'meson_nfc_cmd_access()', thus removing code duplication. Signed-off-by: Arseniy Krasnov <avkrasnov@...> --- drivers/mtd/nand/raw/meson_nand.c | 30 ++++++++++++------------------ 1 file changed, 12 insertions(+), 18 deletions(-) diff --git a/drivers/mtd/nand/raw/meson_nand.c b/drivers/mtd/nand/raw/meson_nand.c index 5d411c4594..19f005202b 100644 --- a/drivers/mtd/nand/raw/meson_nand.c +++ b/drivers/mtd/nand/raw/meson_nand.c @@ -229,14 +229,19 @@ static void meson_nfc_cmd_seed(const struct meson_nfc *nfc, u32 seed) nfc->reg_base + NFC_REG_CMD); } -static void meson_nfc_cmd_access(struct nand_chip *nand, bool raw, bool dir, - int scrambler) +static void meson_nfc_cmd_access(struct nand_chip *nand, bool raw, bool dir, int page) { struct mtd_info *mtd = nand_to_mtd(nand); const struct meson_nfc *nfc = nand_get_controller_data(mtd_to_nand(mtd)); const struct meson_nfc_nand_chip *meson_chip = to_meson_nand(nand); u32 bch = meson_chip->bch_mode, cmd; int len = mtd->writesize, pagesize, pages; + int scrambler; + + if (nand->options & NAND_NEED_SCRAMBLING) + scrambler = NFC_CMD_SCRAMBLER_ENABLE; + else + scrambler = NFC_CMD_SCRAMBLER_DISABLE; pagesize = nand->ecc.size; @@ -252,6 +257,9 @@ static void meson_nfc_cmd_access(struct nand_chip *nand, bool raw, bool dir, cmd = CMDRWGEN(DMA_DIR(dir), scrambler, bch, NFC_CMD_SHORTMODE_DISABLE, pagesize, pages); + if (scrambler == NFC_CMD_SCRAMBLER_ENABLE) + meson_nfc_cmd_seed(nfc, page); + writel(cmd, nfc->reg_base + NFC_REG_CMD); } @@ -566,14 +574,7 @@ static int meson_nfc_write_page_sub(struct nand_chip *nand, return ret; } - if (nand->options & NAND_NEED_SCRAMBLING) { - meson_nfc_cmd_seed(nfc, page); - meson_nfc_cmd_access(nand, raw, DIRWRITE, - NFC_CMD_SCRAMBLER_ENABLE); - } else { - meson_nfc_cmd_access(nand, raw, DIRWRITE, - NFC_CMD_SCRAMBLER_DISABLE); - } + meson_nfc_cmd_access(nand, raw, DIRWRITE, page); cmd = nfc->param.chip_select | NFC_CMD_CLE | NAND_CMD_PAGEPROG; writel(cmd, nfc->reg_base + NFC_REG_CMD); @@ -644,14 +645,7 @@ static int meson_nfc_read_page_sub(struct nand_chip *nand, if (ret) return ret; - if (nand->options & NAND_NEED_SCRAMBLING) { - meson_nfc_cmd_seed(nfc, page); - meson_nfc_cmd_access(nand, raw, DIRREAD, - NFC_CMD_SCRAMBLER_ENABLE); - } else { - meson_nfc_cmd_access(nand, raw, DIRREAD, - NFC_CMD_SCRAMBLER_DISABLE); - } + meson_nfc_cmd_access(nand, raw, DIRREAD, page); meson_nfc_wait_dma_finish(nfc); meson_nfc_check_ecc_pages_valid(nfc, nand, raw); -- 2.30.1

Based on Linux kernel: commit f922bd798bb9 ("mtd: rawnand: add an option to specify NAND chip as a boot device") Allow to define a NAND chip as a boot device. This can be helpful for the selection of the ECC algorithm and strength in case the boot ROM supports only a subset of controller provided options. Signed-off-by: Arseniy Krasnov <avkrasnov@...> --- Changelog: v1 -> v2: * Place 'NAND_IS_BOOT_MEDIUM' according its numerical value. drivers/mtd/nand/raw/nand_base.c | 3 +++ include/linux/mtd/rawnand.h | 5 +++++ 2 files changed, 8 insertions(+) diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c index c40a0f23d7..ed605b4af5 100644 --- a/drivers/mtd/nand/raw/nand_base.c +++ b/drivers/mtd/nand/raw/nand_base.c @@ -4458,6 +4458,9 @@ static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, ofnode nod if (ret == 16) chip->options |= NAND_BUSWIDTH_16; + if (ofnode_read_bool(node, "nand-is-boot-medium")) + chip->options |= NAND_IS_BOOT_MEDIUM; + if (ofnode_read_bool(node, "nand-on-flash-bbt")) chip->bbt_options |= NAND_BBT_USE_FLASH; diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index fb002ae641..61690e816f 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -248,6 +248,11 @@ enum nand_ecc_algo { * kmap'ed, vmalloc'ed highmem buffers being passed from upper layers */ #define NAND_USE_BOUNCE_BUFFER 0x00100000 +/* + * Whether the NAND chip is a boot medium. Drivers might use this information + * to select ECC algorithms supported by the boot ROM or similar restrictions. + */ +#define NAND_IS_BOOT_MEDIUM 0x00400000 /* Options set by nand scan */ /* bbt has already been read */ -- 2.30.1

Patchset is based on patchset for Linux (today merged to nand-next): https://lore.kernel.org/linux-mtd/20240507230903.3399594-1-avkrasnov@.../ Here is description from it: > Amlogic's boot ROM code needs that some pages on NAND must be written > in special "short" ECC mode with scrambling enabled. Such pages: > 1) Contain some metadata about hardware. > 2) Located with some interval starting from 0 offset, until some > specified offset. Interval and second offset are set in the > device tree. > > This patchset adds R/W support for such pages. To enable it we can setup > it in dts: > > nand-is-boot-medium; > amlogic,boot-pages = <1024>; > amlogic,boot-page-step = <128>; > > It means that each 128th page in range 0 to 1024 pages will be accessed > in special mode ("short" ECC + scrambling). In practice this feature is > needed when we want to update first block of NAND - driver will enable > required mode by itself using value from device tree. The only difference is that patchset for Linux updates DT bindings, while this adds NAND_IS_BOOT_MEDIUM flag support. Changelog: v1 -> v2: * Pls see per-patch changelog. Arseniy Krasnov (3): mtd: rawnand: nand_base: support for 'NAND_IS_BOOT_MEDIUM' flag mtd: rawnand: meson: refactor use of 'meson_nfc_cmd_access()' mtd: rawnand: meson: read/write access for boot ROM pages drivers/mtd/nand/raw/meson_nand.c | 84 +++++++++++++++++++++---------- drivers/mtd/nand/raw/nand_base.c | 3 ++ include/linux/mtd/rawnand.h | 5 ++ 3 files changed, 65 insertions(+), 27 deletions(-) -- 2.30.1

Hi <avkrasnov@...> wrote: I will then backport this from linux kernel dd6ed5c9890b759ba1b56697b9f3f50e71909e43 Reviewed-by: Michael Trimarchi <michael@...> -- Michael Nazzareno Trimarchi Co-Founder & Chief Executive Officer M. +39 347 913 2170 michael@... __________________________________ Amarula Solutions BV Joop Geesinkweg 125, 1114 AB, Amsterdam, NL T. +31 (0)85 111 9172 info@... www.amarulasolutions.com

Hi <avkrasnov@...> wrote: unsigned int Please change to unsigned int because I think match options type With this Reviewed-by: Michael Trimarchi <michael@...> -- Michael Nazzareno Trimarchi Co-Founder & Chief Executive Officer M. +39 347 913 2170 michael@... __________________________________ Amarula Solutions BV Joop Geesinkweg 125, 1114 AB, Amsterdam, NL T. +31 (0)85 111 9172 info@... www.amarulasolutions.com

[snip] I've now pushed the v6.10-dts sync to master. -- Tom

Remove the leftover Amlogic GX/G12 bindings headers that maked the v6.10 upstream DT fail to build. Signed-off-by: Neil Armstrong <neil.armstrong@...> --- include/dt-bindings/clock/axg-aoclkc.h | 31 ------- include/dt-bindings/clock/g12a-aoclkc.h | 36 -------- include/dt-bindings/clock/g12a-clkc.h | 153 -------------------------------- include/dt-bindings/clock/gxbb-aoclkc.h | 74 --------------- include/dt-bindings/clock/gxbb-clkc.h | 151 ------------------------------- include/dt-bindings/reset/axg-aoclkc.h | 20 ----- include/dt-bindings/reset/g12a-aoclkc.h | 18 ---- include/dt-bindings/reset/gxbb-aoclkc.h | 66 -------------- 8 files changed, 549 deletions(-) diff --git a/include/dt-bindings/clock/axg-aoclkc.h b/include/dt-bindings/clock/axg-aoclkc.h deleted file mode 100644 index 8ec4a269c7..0000000000 --- a/include/dt-bindings/clock/axg-aoclkc.h +++ /dev/null @@ -1,31 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ -/* - * Copyright (c) 2016 BayLibre, SAS - * Author: Neil Armstrong <narmstrong@...> - * - * Copyright (c) 2018 Amlogic, inc. - * Author: Qiufang Dai <qiufang.dai@...> - */ - -#ifndef DT_BINDINGS_CLOCK_AMLOGIC_MESON_AXG_AOCLK -#define DT_BINDINGS_CLOCK_AMLOGIC_MESON_AXG_AOCLK - -#define CLKID_AO_REMOTE 0 -#define CLKID_AO_I2C_MASTER 1 -#define CLKID_AO_I2C_SLAVE 2 -#define CLKID_AO_UART1 3 -#define CLKID_AO_UART2 4 -#define CLKID_AO_IR_BLASTER 5 -#define CLKID_AO_SAR_ADC 6 -#define CLKID_AO_CLK81 7 -#define CLKID_AO_SAR_ADC_SEL 8 -#define CLKID_AO_SAR_ADC_DIV 9 -#define CLKID_AO_SAR_ADC_CLK 10 -#define CLKID_AO_CTS_OSCIN 11 -#define CLKID_AO_32K_PRE 12 -#define CLKID_AO_32K_DIV 13 -#define CLKID_AO_32K_SEL 14 -#define CLKID_AO_32K 15 -#define CLKID_AO_CTS_RTC_OSCIN 16 - -#endif diff --git a/include/dt-bindings/clock/g12a-aoclkc.h b/include/dt-bindings/clock/g12a-aoclkc.h deleted file mode 100644 index e916e49ff2..0000000000 --- a/include/dt-bindings/clock/g12a-aoclkc.h +++ /dev/null @@ -1,36 +0,0 @@ -/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ -/* - * Copyright (c) 2016 BayLibre, SAS - * Author: Neil Armstrong <narmstrong@...> - * - * Copyright (c) 2018 Amlogic, inc. - * Author: Qiufang Dai <qiufang.dai@...> - */ - -#ifndef DT_BINDINGS_CLOCK_AMLOGIC_MESON_G12A_AOCLK -#define DT_BINDINGS_CLOCK_AMLOGIC_MESON_G12A_AOCLK - -#define CLKID_AO_AHB 0 -#define CLKID_AO_IR_IN 1 -#define CLKID_AO_I2C_M0 2 -#define CLKID_AO_I2C_S0 3 -#define CLKID_AO_UART 4 -#define CLKID_AO_PROD_I2C 5 -#define CLKID_AO_UART2 6 -#define CLKID_AO_IR_OUT 7 -#define CLKID_AO_SAR_ADC 8 -#define CLKID_AO_MAILBOX 9 -#define CLKID_AO_M3 10 -#define CLKID_AO_AHB_SRAM 11 -#define CLKID_AO_RTI 12 -#define CLKID_AO_M4_FCLK 13 -#define CLKID_AO_M4_HCLK 14 -#define CLKID_AO_CLK81 15 -#define CLKID_AO_SAR_ADC_SEL 16 -#define CLKID_AO_SAR_ADC_CLK 18 -#define CLKID_AO_CTS_OSCIN 19 -#define CLKID_AO_32K 23 -#define CLKID_AO_CEC 27 -#define CLKID_AO_CTS_RTC_OSCIN 28 - -#endif diff --git a/include/dt-bindings/clock/g12a-clkc.h b/include/dt-bindings/clock/g12a-clkc.h deleted file mode 100644 index a93b58c5e1..0000000000 --- a/include/dt-bindings/clock/g12a-clkc.h +++ /dev/null @@ -1,153 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ OR MIT */ -/* - * Meson-G12A clock tree IDs - * - * Copyright (c) 2018 Amlogic, Inc. All rights reserved. - */ - -#ifndef __G12A_CLKC_H -#define __G12A_CLKC_H - -#define CLKID_SYS_PLL 0 -#define CLKID_FIXED_PLL 1 -#define CLKID_FCLK_DIV2 2 -#define CLKID_FCLK_DIV3 3 -#define CLKID_FCLK_DIV4 4 -#define CLKID_FCLK_DIV5 5 -#define CLKID_FCLK_DIV7 6 -#define CLKID_GP0_PLL 7 -#define CLKID_CLK81 10 -#define CLKID_MPLL0 11 -#define CLKID_MPLL1 12 -#define CLKID_MPLL2 13 -#define CLKID_MPLL3 14 -#define CLKID_DDR 15 -#define CLKID_DOS 16 -#define CLKID_AUDIO_LOCKER 17 -#define CLKID_MIPI_DSI_HOST 18 -#define CLKID_ETH_PHY 19 -#define CLKID_ISA 20 -#define CLKID_PL301 21 -#define CLKID_PERIPHS 22 -#define CLKID_SPICC0 23 -#define CLKID_I2C 24 -#define CLKID_SANA 25 -#define CLKID_SD 26 -#define CLKID_RNG0 27 -#define CLKID_UART0 28 -#define CLKID_SPICC1 29 -#define CLKID_HIU_IFACE 30 -#define CLKID_MIPI

Based on Linux kernel: commit f922bd798bb9 ("mtd: rawnand: add an option to specify NAND chip as a boot device") Allow to define a NAND chip as a boot device. This can be helpful for the selection of the ECC algorithm and strength in case the boot ROM supports only a subset of controller provided options. Signed-off-by: Arseniy Krasnov <avkrasnov@...> --- Changelog: v1 -> v2: * Place 'NAND_IS_BOOT_MEDIUM' according its numerical value. drivers/mtd/nand/raw/nand_base.c | 3 +++ include/linux/mtd/rawnand.h | 5 +++++ 2 files changed, 8 insertions(+) diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c index c40a0f23d7..ed605b4af5 100644 --- a/drivers/mtd/nand/raw/nand_base.c +++ b/drivers/mtd/nand/raw/nand_base.c @@ -4458,6 +4458,9 @@ static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, ofnode nod if (ret == 16) chip->options |= NAND_BUSWIDTH_16; + if (ofnode_read_bool(node, "nand-is-boot-medium")) + chip->options |= NAND_IS_BOOT_MEDIUM; + if (ofnode_read_bool(node, "nand-on-flash-bbt")) chip->bbt_options |= NAND_BBT_USE_FLASH; diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index fb002ae641..61690e816f 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -248,6 +248,11 @@ enum nand_ecc_algo { * kmap'ed, vmalloc'ed highmem buffers being passed from upper layers */ #define NAND_USE_BOUNCE_BUFFER 0x00100000 +/* + * Whether the NAND chip is a boot medium. Drivers might use this information + * to select ECC algorithms supported by the boot ROM or similar restrictions. + */ +#define NAND_IS_BOOT_MEDIUM 0x00400000 /* Options set by nand scan */ /* bbt has already been read */ -- 2.30.1