开云体育

Hello Erik

Got my unit today and have already uploaded your latest release. I like it !

I have yet to look through your code to get to know it (can;t resist) but I was just wondering about the tall DC peak at the start/left of the FFT display. That normally indicates a DC offset of the Real/Imag input values to the FFT. Do you measure and cancel out the DC offset when we do a simple High-Low through cable calibration I wonder ?

Cathy

The tinySA is not an FFT SA but super heterodyne. The zero hz spike is the LO leakage through the mixer. Unavoidable in this architecture

oh right.

Normally you can apply IQ gain and phase balance cancellation around the DC point (and across the rest of spectrum by linear interpolation using a 3 or 4 points). It's what I do in all the SDR I/Q spectrum processing code I do.

I'll look into it once I know what's what.

Ah, I'm working on such IQ gain and phase balancing right now and I would welcome some help with a good example on how to do this.
Can you point me some some code?
I"m sampling I/Q input, doing a integer or float FFT and then I need to do the automatic IQ imbalance compensation (either blind or using some known input signals) but the math is too complex for me and I can not find examples on how to do this

Yes for sure Erik, anything to help. It would remove that 0Hz spike and give a nice flat base line.

It won't be today though as I'm in another frame of mind today :) .. I'll get back with some example code or links for you tomorrow or so.