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Hello,
Does anybody know why in the design of NanoVNA-f V2, a 24 MHz crystal is used for Si5351A? In the datasheet of Si5351A it is mentioned that the chip shall be driven by either 25 or 27 MHz crystal.

You will likely want to pose this question on the "NanoVNA-F & DEEPELEC" and/or the "NanoVNA V2 Users Group" groups.io forums.

DaveD

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Depend from used IF, 12k
More easy get this step.
IF depend from ADC speed, ADC from ... USB 48M

Is it a passive crystal or an oscillator? A passive crystal may still work fine, but some parameters may not be guaranteed for all parts.
External oscillator will work over much wider range. 10MHz is not uncommon.

73, Mike AF7KR

I understand that the system needs clocks like 48 MHz (USB), etc. But in the datasheet of Si5351A, it mentions that,
1. Generates up to eight non-integer-related frequencies from 2.5 kHz to 200 MHz
2. Exact frequency synthesis at each output (0 ppm error)
3. Operates from a low-cost, fixed frequency crystal: 25 or 27 MHz

So, to my understanding, using 25 or 27 Mhz crystal shall be enough to generate any frequency between 2.5 Khz up to 200 MHz (including a 48 MHz for USB, etc.)
Am I missing something here?

I can’t speak to the designer’s original intent, but sometimes, you choose a starting frequency for other reasons.
For example, you need to *program* the Si part before it can generate all those frequencies, and if you want your processor to run off the same frequency as you’re going to feed the Si5351, then you choose a frequency for your processor.

I believe the NanoVNA H and similar all use a 26 MHz crystal which is within the range of 25 to 27 given in the data sheet. You’ve said 25 or 27 - that’s what the blurb at the top of the data sheet says, but if you look down in the body of the sheet, it’s Min 25 max 27.

And I suspect that the Si5351 would run just fine at 24 MHz, although the output frequency range might be restricted in some way (maybe a limitation on max output frequency, because of the maximum value for some divider in a PLL)

Correction, the NanoVNA I have uses a 26 MHz TCXO, not a crystal.

The 24 MHz clock in that NanoVNA product that this group is not about is
likely used because it's easy to get a 48 MHz clock for USB from there.
A simple frequency doubler can be used.

The spec sheet for the Si5351A lists two clock frequencies at the
beginning, 25 and 27 MHz, and I believe the original PC software for
generating parameters for the Si5351A only worked at those specific
frequencies, but it has always listed a range from 25 to 27 MHz later in
the sheet. Lots of other programs and libraries will work for an Si5351A
that is used at other clock speeds, and a number of products
use non-standard speeds. The uBITX, for example, uses a 26 MHz clock. I
don't know why; perhaps the manufacturer has a cheap source of 26 MHz
crystals.

For a while, the 80 and 160 meter versions of the QCX from QRP Labs used
frequencies lower than 25 MHz, because their original method of using the
chip to generate quadrature clock signals required that change to work at
lower frequencies. Hans Summers later found a different method that does
not require the change in clock speed, and current production does not
use the reduced clock speed. One of the things that drove looking for
another method happened because there was a shortage of the Si5351A for a
while during the pandemic years, and so some companies (including QRP Labs)
switched to an alternative from China, the MS5351M. It's a drop-in
replacement in most cases, but it will not work at the 12 MHz clock
frequency that was used in the 160 meter QCX. Only one version of the
MS5351M is made, the 10 pin MSOP package that generates three clocks. There
are no equivalents to the Si5351A in larger packages that have more
outputs, nor to the Si5351B and Si5351C that have additional features.

Many products, including the original NanoVNA and NanoVNA-H that this group
IS about, also operate the Si5351A out of spec in another way. The
specifications only guarantee operation up to 200 MHz, but many products
push it to higher frequencies approaching 300 MHz. The exact frequency an
Si5351A can reach varies by chip, and also depends on temperature. The chip
may consume more power than the spec sheet says at those higher
frequencies, and specs such as duty cycle and jitter may not be met.

The original version of the chip, without the -B at the end, was only
specified to 160 MHz, which is why the Adafruit modules list that as their
maximum frequency, but that version of the chip hasn't been made for many
years and all current production modules use the version that is specified
to run at 200 MHz. The specific version used in most of the products
familiar to hams is Si5351A-B-GT (or GTR, meaning it comes on a reel rather
than loose), which is a 10 pin MSOP rather than a 16 or 20 pin QFN. (The
original was also offered in a 24 pin QSOP.) Variants like
Si5351A-Bxxxxx-GT are sometimes used because of unavailability of the
unprogrammed parts; those are pre-programmed chips that generate fixed
outputs at power-up, but they still respond to I2C commands to change the
outputs. Some of those also change the I2C port; watch out for that.

The datasheet summary info is sort of misleading. It says 25 or 27, but down within, it says min 25 max 27.

The SAA-2 / NanoVNA v2 designer has stated that si5351 and adf4350 had better phase noise performance with a 24MHz clock, so that is what got used.

It's worth noting that the Si5351 and it's Mstar clone will happily work with clock frequencies well beyond the 24-27 MHz range stated in the data sheet. For example, it's used in a number of frequency synthesizers with a 10 MHz reference clock with very little phase noise degradation - and it's been generally found suitable for narrowband use into at least the VHF range.

This web page shows results of careful testing:

and


This works because the goal is to keep the VCO in the design range and as long as the divisors/numerators/denominators are appropriately selected, this can be done at nearly any (reasonable) clock frequency. I don't recall what the maximum usable frequency is but it's over 30 MHz.

So no, the use of a 24 MHz clock with the Si5351 is of no concern as long as its parameters are appropriately calculated.

73,
Clint, KA7OEI

On Tue, Mar 12, 2024 at 09:45 PM, Ismo V??n?nen OH2FTG wrote:

The SAA-2 / NanoVNA v2 designer has stated that si5351 and adf4350 had better
phase noise performance with a 24MHz clock, so that is what got used.

Good point! I didn't think about the possibility that a 24Mhz OSC would reduce the phase noise.

On Thu, Mar 14, 2024 at 05:46 AM, Clint Turner wrote:

It's worth noting that the Si5351 and it's Mstar clone will happily work with
clock frequencies well beyond the 24-27 MHz range stated in the data sheet.
For example, it's used in a number of frequency synthesizers with a 10 MHz
reference clock with very little phase noise degradation - and it's been
generally found suitable for narrowband use into at least the VHF range.

This web page shows results of careful testing:

and


This works because the goal is to keep the VCO in the design range and as long
as the divisors/numerators/denominators are appropriately selected, this can
be done at nearly any (reasonable) clock frequency. I don't recall what the
maximum usable frequency is but it's over 30 MHz.

So no, the use of a 24 MHz clock with the Si5351 is of no concern as long as
its parameters are appropriately calculated.

73,
Clint, KA7OEI

Thanks Clint!
Very good information.