Dave,
The minimum energy to cause damage has gone way down over the years as transistor geometries have shrunk, but I don't know specific values.
When I started doing chip design, the state of the art was with NMOS FET gates around 9 microns by 9 microns in minimum area. Present CMOS transistor gates (in high density digital circuits) are around 7 nanometers by 7 nanometers minimum. In area, that is more than a million times smaller.
RF devices are not normally that small, but you get the idea. Even in a fairly large device, gate oxide damage is usually concentrated in a small weak spot of the overall device, so it doesn't necessarily help a lot if the gate area is large. The usual plan in protecting sensitive circuits is to use things like (relatively) large junction devices to direct ESD currents to supply rails instead of FET gates. These junctions are reverse biased in normal operation, but they still can contribute to distortion problems.
--John
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On Sun, Sep 22, 2019 at 08:25 PM, Dr. David Kirkby from Kirkby Microwave Ltd wrote:
On Mon, 23 Sep 2019 at 02:36, johncharlesgord via Groups.Io <johngord=
[email protected]> wrote:
Dave,
50 ohms to ground provides some protection, but often not enough.
The standard human body model (HBM) for ESD testing is 1500 ohms in
series with 100pF. The 1500 ohms is supposed to represent the impedance of
the discharge path through the body, while the 100pF represents the
capacitance of the body including something like rubber soled shoes to a
grounded surface.
Even at a relatively low static voltage like 1500v, one ampere can
(briefly) flow, causing a drop of 50 volts across the 50 ohm resistor.
Small geometry semiconductors like those used in RF mixers can be damaged
by such a hit. Some situations can generate static voltages that are much
higher.
--John Gord
Thank you. I was unaware of that. Perhaps that¡¯s why my 8720 says no ESD on
the front panel. However, the test ports on that are no 50 ohns at DC, as
there are bias-T fitted too.
I assume that there must be some minimum amount of energy required to
damage a semiconductor.
Dave.
