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The new OS, Bookworm , has new policies for python programs. (It also has many other changes). Unfortunately it's the way forward and we have no choice in the matter. It's required for the new Pi 5 to work. (I have one running Quisk here!)

I had good luck using pipX to do the whole install properly.

Note that it's not pre-installed...

I tried installing Quisk using the online instructions and am getting crabbed at by Python that I need to install it in a virtual environment. Is that the preferred way to install it?

This is a fresh install of Debian Bookworm, now on Testing, but it behaved the same on Stable. Python in 3.11.6. Debian has a packaged version of Quisk, but it's several versions behind which means it's not matching the version installed on the Raspberry Pi I'm trying to attach it to.

# sudo -H python3 -m pip install --upgrade quisk
error: externally-managed-environment

× This environment is externally managed
╰─&驳迟; To install Python packages system-wide, try apt install
???python3-xyz, where xyz is the package you are trying to
???install.
????
???If you wish to install a non-Debian-packaged Python package,
???create a virtual environment using python3 -m venv path/to/venv.
???Then use path/to/venv/bin/python and path/to/venv/bin/pip. Make
???sure you have python3-full installed.
????
???If you wish to install a non-Debian packaged Python application,
???it may be easiest to use pipx install xyz, which will manage a
???virtual environment for you. Make sure you have pipx installed.
????
???See /usr/share/doc/python3.11/README.venv for more information.

note: If you believe this is a mistake, please contact your Python installation or OS dist
ribution provider. You can override this, at the risk of breaking your Python installation
or OS, by passing --break-system-packages.

Regards,

Randall Sanborn
AE8RS

Thanks Jim.

BTW, the IO board test program n2adr_test/build/main.uf2 now generates a test pattern in response to a "1" written to REG_ANTENNA_TUNER. This may be useful to other SDR authors.

Jim
N2ADR

Hi Jim,

All the code is in hermes/quisk_widgets.py.?

Does the 0xEE appear in the ATU control window? When it does, the "Spot" button should be pressed and red. Is it??

As your code operates, the codes sent from register REG_ANTENNA_TUNER should appear in the control window, and that is a good start for debugging.

Jim
N2ADR

Hello Peter,

I had eight LEDs on my board for debugging. It enabled me to output a byte of information; sort of a printf() for those without a logic analyzer.? There was never a defined use except for debugging. Anyway, the firmware determines the LEDs and so you need to look at the firmware to see if there is a defined use.

Jim
N2ADR

Hello Peter,

Just to be clear, the noise figure I reported is from my original home made board, not from a later board. My clock does not have the series LC filter.?

And thank you for the effort you have put into this.

Jim
N2ADR

Hi Jim,

Do you have a description of the LED status of the 6 LEDs which are connected to the FPGA on the HiQSDR board of DB1CC? I have been searching on internet and in the file folder here in groups.io, but have not found a single reference. In the schematic I found 8 LEDs, on the actual board there seem to be only 6:?D3, 6, 7, 8, 9 and 10.

Best 73s,

Peter, PA3BIY

Yes, I still need to add the ATU support. I will start working on it. Unfortunately I don't have an ATU to test.

Jim
N2ADR

A final note for anyone who intends to modify the clock circuit. By-passing C130 and L8 causes the RF voltage at CLKP (pin 10) of the ADS5500 to be amplified to > 8V p/p. This is due to the impedance of the tracks and the high input impedance of the Clock pins. There is a simple solution:
- Replace C130 with a 1 nF cap;
- Replace L8 by a short;
- Solder a 68...75 Ohm 0603 resistor between the ground of C76 and C73.

The resistor ensures that the PCB trace is more or less terminated. The voltage is now limited to about 3...4 V p/p at pin 10.

GL es 73s,

Peter, PA3BIY
?

All,

?

Two weeks ago I reported about the relatively high noise floor level which I observed on my HiQSDR board. Based on the feedback I received, I ran several tests and experiments which eventually resulted in an improved noise floor.

1. Change of the power supply did not help to resolve the high noise floor issue. The on board LDO’s do their work as anticipated.
2. Using a heat gun I noticed that the noise floor rose by 10 dB when I slightly heated up the ADS5500 (ADC) from the top side. When I subsequently applied the same heat to the bottom side of the PCB, the noise would drop very fast to the original (but a bit too high) level. Hence, I started to wonder whether the hidden ground pad of the ADS5500 was perhaps floating (i.e. not properly soldered)? So I removed the ADC, and resoldered it (that’s the short version!). The result? NO DIFFERENCE whatsoever! The pad apparently was soldered properly after all.
3. Next I inserted a 10 Ohm resistor in the Vcm feedback path between the ADC and driver (as per data sheet), but that did not noticeably improve the noise floor.
4. Running out of options I wondered about the quality of the ADC clock source, but the type used on the board by DB1CC runs a very low jitter (< 50 fs), so could not be the cause, or could it? DB1CC uses a series resonance circuit (220 nH + 7.5 pF) between this 122.88 MHz oscillator and the ADC. On my oscilloscope the levels looked fine, but when I replaced the 7.5 pF cap with a tune cap I could fine tune and let the noise floor drop by 8 dB!! That accounted for much of the high noise floor that was present in my version. I just wonder what the use is of this series resonance circuit? The oscillator runs in a fundamental mode, i.e. there are no “sub harmonics” present at its output. As an additional experiment I by-passed the series LC-circuit and gained another dB of improved noise floor. But that’s not the end of the story.

I was curious about the dynamic range, so I applied a carrier and went all the way to -25 dBm (on 10.7 MHz) and found no obvious spurs popping up within the 300 kHz pass band. That’s > 90 dB of dynamic range and the noise floor did not change during this test. Then I removed the by-pass and used the (tuned) series LC circuit again in the oscillator chain and noticed something peculiar: Applying the the same strong RF signal as in the previous test now raised the general noise floor by 10 dB! So by-passing the series LC filter provided much better performance than including it. I wonder if others have performed the same exercise?

?

Can anyone can enlighten me what the purpose is of this series LC-filter (perhaps improving the clock symmetry?).

?

73s,

?

Peter, PA3BIY

?

Thanks Jim, it upgraded nicely this time.
73 - Pierre - FK8IH