开云体育

John,

开云体育

Thanks, Don, but that can compromise routing on the other layer. Of course, it's simpler if there is no problem on the other layer.

John,

If I understand what you are trying to do is to get one track across another then the simplest way is to use a couple of vias. This would allow you to take the crossing track to the back side of the board, cross the track and then bring it back to the front side. No extra components needed. Electrons are perfectly happy with switching sides occasionally! ;>)

Hope this helps,

Don, K5DW

On Sep 20, 2024, at 10:31?AM, John Woodgate via groups.io <jmw@...> wrote:

?

How are jumpers? included in a board design? Do they appear in the schematic or only in the PCB layout? Are they to be treated as zero-ohm resistors, perhaps?

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Best Wishes
John Woodgate
Keep trying

Virus-free.

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Best Wishes
John Woodgate
Keep trying

-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA512

Hello Pierre-Raymond

for

example 0-Ohm resistor with a power Input connected to gnd power line
and a power output with a power flag connected to the Gnd pin of the
IC.

If your 0-Ohm resistor connects direct to a power flag, then there is
perhaps no need for a power output, power input. You can use just
"passive". The Type has to fit only with the rest of the net.

Shouldn't there be a net name conflict with the IC gnd and the
resistor's output ?

Name is not always an issue, because the net cut in half with the 0-Ohm
resistor will get a new name at last in one of the halfs.

There are rules for naming the nets, despite i do not know them. This
rules will make automatical new names. But of course, if you tie a
label to the net, then there you will get a conflict.

KiCad will keep the net name like the label name in the section tied to
the label, and the other part will get automatic a new name. you have
to tie a new label to this part, if you want a distinctive label, and
of course, there will be a name conflict with the existing label. (for
global labels, the indirect connection between global labels would try
to bypass your 0-Ohm resistor at the board)
So you have to choose a new one.

And, with a fuse and the same rationale, wouldn't
the ERC cry a bit ?

Practically i use "3V3" as label for the power rail to the ics, and
"3V3_Feeding" for the 3,3V rail between the power plug and the fuse,
as an example.
For a 0-Ohm resistor, you could perhaps name after the devices
connected. As an Example "3V_IC1-2-5" and "3V3_IC4" with the 0-Ohm
Resistor connecting "3V_IC1-2-5" and "3V3_IC4".

This is also the way this is handled in altium. Perhaps only older
Versions, i do not know exactly.

A similar problem like at fuses and 0-Ohm resistors occures at net-ties,
which are special designed with two (or more) pins/pads which are tied
to different named/labeled nets. This is a way to keep analog gnd and
digital gnd away eatch other conected only in one point and avoiding
connecting them at wrong places by autorouter or even copper pour.


With best regards: Bernd Wiebus alias dl1eic


Am Sat, 21 Sep 2024 21:46:26 +0200
schrieb "Pierre-Raymond Rondelle via groups.io"
<pierreraymondrondelle@...>:

Bernd, Thank you to point this aspect. I didn't even think to the
fuse. I save your message it will probably be helpful in the future.

Just one question (it makes a while I didn't design a board) : for
example 0-Ohm resistor with a power Input connected to gnd power line
and a power output with a power flag connected to the Gnd pin of the
IC. Shouldn't there be a net name conflict with the IC gnd and the
resistor's output ? And, with a fuse and the same rationale, wouldn't
the ERC cry a bit ? Regards

On 21.09.24 21:05, Bernd Wiebus via groups.io wrote:
-----BEGIN PGP SIGNED MESSAGE-----

Hash: SHA512

Hello Pierre-Raymond

Mandatory for power lines.

Same Problem as for fuses. It is not the problem, that you use two
nets (numbers will be enough) but for the ERC-Testing, because you
end a power line, and the other end of the device is no power line.
So the ERC-Test will throw errormessages.

Cure for this seems for zero ohm resistors the same as for fuses:
Define one pin as power input, so you can connect it to a symbol
with power flag, and the outher as power output, so you can
connect it to passive pins. Then the ERC will be satisfied.

Of course, as for small designs, you can easyly ignore the error
messages, as far as you not get confused with real errors.

Be aware, there sometimes is a confusion with names. The pin, where
the fuse or zero ohm resistor is tied to a pin with power flag

Other aspect: Keeping the zero ohm resistor in the schematic will
make the DRC at the board run smooth. And if you forgot the resistor
accidentially, you will got an error message. :O)

With best regards: Bernd Wiebus alias dl1eic



Am Sat, 21 Sep 2024 19:14:54 +0200
schrieb "Pierre-Raymond Rondelle via groups.io"
<pierreraymondrondelle@...>:

John, Robert,

Zero Ohms resistors have the drawback to create two nets.

I had similar issue some years ago with Kicad 5.20, it didn't have
any practical solution for that. So, I cheated, creating symbol and
models for keeping the same net name on both sides of the jumper.
Mandatory for power lines. My computer being too old, I didn't
migrate to newer kicad versions. Consequently, didn't test the
trick on post 5.20. But since you're asking the jumper question I
assume that this hasn't been solved.

Instead, I made a specific component using 3 pads with the same net
name, whichever the pad number is. In the middle a square one (thin
and long, this is the "jumper wire"), of course not drilled and two
round ones at the ends. The 3 pads were? overlapping, establishing
a connection in between the ends.

For the schematics,I created a dedicated symbol with one terminal,
(I named it "lnk"), and filled the attribute table for the BOM. I
placed it on a convenient place on the net the jumper is
installed, I numbered it. That's all.

Refer to the annexed files. Remember it's ver 5.20. You may have to
modify it regarding the new version rules. My application was to
route a number of different single side PCBs where power lines were
routed on component side via jumper wires. Refer to: "Strap
footprint.png" & "Strap footprints in use.png" In schema, the
symbol was: "Strap symbol for eeschema.png", represented by "Strap
Symbols attached to the drawing.png" in the electrical drawing.
"My_Straps.pretty.rar" is the strap library model for 3.81 to 22.86
mm long jumpers. And for the PCB I also provide an example
"strap_test.rar" (not functional, for decorating your bedroom only
! ). Have fun



On 20.09.24 18:49, Tony Casey via groups.io wrote:
If you want to use headers and links, I have schematic symbols for
those. Perhaps KiCad even has them in one of its extensive
library, I don't know.

Alternatively, use zero Ohm resistors, and add a text note to say
what they are for. Do that, as well for links. If they are
multiple position links, add a truth table.

I try to put everything on the schematic. That way, nothing gets
missed.

--
Regards,
Tony?

On 20 Sep 2024 17:17, John Woodgate <jmw@...> wrote:

Thanks, Robert. I suppose they have to be placed in the schematic

exactly where they are needed in the layout, which can make the
schematic look very odd. On 2024-09-20 16:35, Robert via
groups.io wrote: They are normally in the schematic as zero ohm
resistors. In the
layout they can be whatever you like, eg pukkka zero ohm
resistors

(wire-ended or surface mount), hand-cut wire links, blobs of
solder, etc.

Regards,

Robert

* Plain text email - safe, readable, inclusive. *


--
This email has been checked for viruses by Avast antivirus
software. www.avast.com





--
OOO - Own Opinions Only

Best Wishes
John Woodgate
Keep trying

Virus-free.www.avg.com

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I can't test it now, but IIRC it is (was) possible to create a symbol with multiple pins tied to the same net. Just create a device with 2 pins and assign it the footprint you need.

Diego

-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA512

Hello Diego

I can't test it now, but IIRC it is (was) possible to create a symbol
with multiple pins tied to the same net. Just create a device with 2
pins and assign it the footprint you need.

Yes, of course. A symbol with multiple Pins connected to the same net.
Thats easy. But a symbol whose pins are tied to one another and
DIFFERENT other Nets without getting the autorouter or copper fill
making unwanted connections.

Think about analog and digital Signals on one board. The grounds of
those analog and digital Signals schould be connected at only one
point, and all other connections should be avoided for EMC reasons.

And ERC and DRC should be done ok and smooth.

with best regards: Bernd Wiebus alias dl1eic






Am Sun, 22 Sep 2024 09:51:18 +0200
schrieb "NdK via groups.io" <ndk.clanbo@...>:

I can't test it now, but IIRC it is (was) possible to create a symbol
with multiple pins tied to the same net. Just create a device with 2
pins and assign it the footprint you need.

Diego

Il dom 22 set 2024, 08:49 Bernd Wiebus via groups.io <bernd.wiebus=
[email protected]> ha scritto:

-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA512

Hello Pierre-Raymond

for

example 0-Ohm resistor with a power Input connected to gnd power
line and a power output with a power flag connected to the Gnd
pin of the IC.

If your 0-Ohm resistor connects direct to a power flag, then there
is perhaps no need for a power output, power input. You can use just
"passive". The Type has to fit only with the rest of the net.

Shouldn't there be a net name conflict with the IC gnd and the
resistor's output ?

Name is not always an issue, because the net cut in half with the
0-Ohm resistor will get a new name at last in one of the halfs.

There are rules for naming the nets, despite i do not know them.
This rules will make automatical new names. But of course, if you
tie a label to the net, then there you will get a conflict.

KiCad will keep the net name like the label name in the section
tied to the label, and the other part will get automatic a new
name. you have to tie a new label to this part, if you want a
distinctive label, and of course, there will be a name conflict
with the existing label. (for global labels, the indirect
connection between global labels would try to bypass your 0-Ohm
resistor at the board) So you have to choose a new one.

And, with a fuse and the same rationale, wouldn't
the ERC cry a bit ?

Practically i use "3V3" as label for the power rail to the ics, and
"3V3_Feeding" for the 3,3V rail between the power plug and the fuse,
as an example.
For a 0-Ohm resistor, you could perhaps name after the devices
connected. As an Example "3V_IC1-2-5" and "3V3_IC4" with the 0-Ohm
Resistor connecting "3V_IC1-2-5" and "3V3_IC4".

This is also the way this is handled in altium. Perhaps only older
Versions, i do not know exactly.

A similar problem like at fuses and 0-Ohm resistors occures at
net-ties, which are special designed with two (or more) pins/pads
which are tied to different named/labeled nets. This is a way to
keep analog gnd and digital gnd away eatch other conected only in
one point and avoiding connecting them at wrong places by
autorouter or even copper pour.


With best regards: Bernd Wiebus alias dl1eic


Am Sat, 21 Sep 2024 21:46:26 +0200
schrieb "Pierre-Raymond Rondelle via groups.io"
<pierreraymondrondelle@...>:

Bernd, Thank you to point this aspect. I didn't even think to the
fuse. I save your message it will probably be helpful in the
future.

Just one question (it makes a while I didn't design a board) : for
example 0-Ohm resistor with a power Input connected to gnd power
line and a power output with a power flag connected to the Gnd
pin of the IC. Shouldn't there be a net name conflict with the IC
gnd and the resistor's output ? And, with a fuse and the same
rationale, wouldn't the ERC cry a bit ? Regards

On 21.09.24 21:05, Bernd Wiebus via groups.io wrote:
-----BEGIN PGP SIGNED MESSAGE-----

Hash: SHA512

Hello Pierre-Raymond

Mandatory for power lines.

Same Problem as for fuses. It is not the problem, that you use
two nets (numbers will be enough) but for the ERC-Testing,
because you end a power line, and the other end of the device
is no power line. So the ERC-Test will throw errormessages.

Cure for this seems for zero ohm resistors the same as for
fuses: Define one pin as power input, so you can connect it to
a symbol with power flag, and the outher as power output, so
you can connect it to passive pins. Then the ERC will be
satisfied.

Of course, as for small designs, you can easyly ignore the error
messages, as far as you not get confused with real errors.

Be aware, there sometimes is a confusion with names. The pin,
where the fuse or zero ohm resistor is tied to a pin with power
flag

Other aspect: Keeping the zero ohm resistor in the schematic
will make the DRC at the board run smooth. And if you forgot
the resistor accidentially, you will got an error message. :O)

With best regards: Bernd Wiebus alias dl1eic



Am Sat, 21 Sep 2024 19:14:54 +0200
schrieb "Pierre-Raymond Rondelle via groups.io"
<pierreraymondrondelle@...>:

John, Robert,

Zero Ohms resistors have the drawback to create two nets.

I had similar issue some years ago with Kicad 5.20, it didn't
have any practical solution for that. So, I cheated, creating
symbol and models for keeping the same net name on both sides
of the jumper. Mandatory for power lines. My computer being
too old, I didn't migrate to newer kicad versions.
Consequently, didn't test the trick on post 5.20. But since
you're asking the jumper question I assume that this hasn't
been solved.

Instead, I made a specific component using 3 pads with the
same net name, whichever the pad number is. In the middle a
square one (thin and long, this is the "jumper wire"), of
course not drilled and two round ones at the ends. The 3 pads
were overlapping, establishing a connection in between the
ends.

For the schematics,I created a dedicated symbol with one
terminal, (I named it "lnk"), and filled the attribute table
for the BOM. I placed it on a convenient place on the net the
jumper is installed, I numbered it. That's all.

Refer to the annexed files. Remember it's ver 5.20. You may
have to modify it regarding the new version rules. My
application was to route a number of different single side
PCBs where power lines were routed on component side via
jumper wires. Refer to: "Strap footprint.png" & "Strap
footprints in use.png" In schema, the symbol was: "Strap
symbol for eeschema.png", represented by "Strap Symbols
attached to the drawing.png" in the electrical drawing.
"My_Straps.pretty.rar" is the strap library model for 3.81 to
22.86 mm long jumpers. And for the PCB I also provide an
example "strap_test.rar" (not functional, for decorating your
bedroom only ! ). Have fun



On 20.09.24 18:49, Tony Casey via groups.io wrote:
If you want to use headers and links, I have schematic symbols
for those. Perhaps KiCad even has them in one of its extensive
library, I don't know.

Alternatively, use zero Ohm resistors, and add a text note to
say what they are for. Do that, as well for links. If they are
multiple position links, add a truth table.

I try to put everything on the schematic. That way, nothing
gets missed.

--
Regards,
Tony

On 20 Sep 2024 17:17, John Woodgate <jmw@...> wrote:

Thanks, Robert. I suppose they have to be placed in the
schematic

exactly where they are needed in the layout, which can make
the schematic look very odd. On 2024-09-20 16:35, Robert via
groups.io wrote: They are normally in the schematic as zero
ohm resistors. In the
layout they can be whatever you like, eg pukkka zero ohm
resistors

(wire-ended or surface mount), hand-cut wire links, blobs of
solder, etc.

Regards,

Robert

* Plain text email - safe, readable, inclusive. *


--
This email has been checked for viruses by Avast antivirus
software. www.avast.com





--
OOO - Own Opinions Only

Best Wishes
John Woodgate
Keep trying

Virus-free.www.avg.com

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开云体育

Hi,

This is exactly what I did on my special strap: (Strap footprint.png figure), round pads #1 and #2 & straight one #3 are connected together hence to the same net.

On the symbol library (Strap symbol for eeschema.png fig.), what I missed to mention is that the 3 pads are superimposed. Clearly indicated on the table but barely visible on the symbol layout abstract of the same image. The 2 hidden (#2 & #3) nets numbers are located under #1, in between "Passive" and "Passive" grey words.

Sorry for this omission, I designed it some years ago and, of course, I forgot to tell !