Export Kicad Libraries while kicad isnt working
Hello everyone,
I have been using?Kicad 6 on Win10 laptop for months now and our antivirus software (Trellix Endpoint Security) at the company reported this data as a trojan C:\Program
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lorenzo.gherardelli@...
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#23731
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Re: KiCad 7.0.5 AC Simulation question
OK, perhaps I should rephrase my question as the poor circuit I posted seems to be preoccupying the discussion.
Could anyone please post an example of a successful AC response produced using the
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CW
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#23730
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Re: KiCad 7.0.5 AC Simulation question
If the output is a dc level, it will quite fairly refuse an ac sweep.
As others said, this type of circuit (phase splitter?) should swing the output around 0V.
You wouldn't expect a network analyser
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applewiz2000
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#23729
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Re: KiCad 7.0.5 AC Simulation question
Thanks - the circuit, as you have pointed out, has not yet had the benefit of 'design', merely 'simulation'.
However I am still not understanding why I can't seem to perform an AC analysis
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CW
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#23728
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Edited
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Re: KiCad 7.0.5 AC Simulation question
It surely is. The base voltage and R5 indicate a current of about 6 mA, which doesn't work with R4 being 17.8 k. I've never seen a concertina phase-splitter with different collector and emitter
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John Woodgate
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#23727
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Re: KiCad 7.0.5 AC Simulation question
Not sure- but it would look like Q3 may be saturated.
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Gordon Hardman
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#23726
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Re: Drawing Sheet SVG Import
Hi Augustine,
you need to convert the svg file to a bitmap file with a graphics program and then import the bitmap into the drawing sheet.
I've done it on both drawing paper and pcb although, to be
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alessandro longo
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#23725
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KiCad 7.0.5 AC Simulation question
I'm having trouble getting an AC simulation to work in 7.0.5. Could be I am just not doing something right but 'the obvious' things don't work - nor does 'doing something similar to what I do in
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CW
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#23724
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Re: Drawing Sheet SVG Import
The image has a lot of bezier curves and importing the png into the Drawing Sheet Editor does not look as nice as importing the svg in the Footprint Editor to the silk. An extremely high resolution
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Augustine Savoca
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#23723
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Re: Drawing Sheet SVG Import
What about the png is not desirable? Perhaps converting with a higher output resolution will provide better results.
David
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David Novak
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#23722
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Drawing Sheet SVG Import
Hello All,
I would like to know if anyone has an idea on how to import a vector graphics file (specifically svg in this case) into the drawing sheet editor? Or otherwise place an svg on a drawing
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Augustine Savoca
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#23721
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Re: Very first experiments with the ngspice Simulator
I'm afraid I don't. I'm not familiar with Python.
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CW
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#23720
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Re: Very first experiments with the ngspice Simulator
Thank you for your impressions. I'm yet to start using the simulator.
Do you know of any python-package like pyltspice which allows to work with e.g. stepped result data nicely?
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fbaettermann
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#23719
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Very first experiments with the ngspice Simulator
I have just spent a few hours playing around with the ngspice Simulator in KiCad 7. I am already a fan. Some very initial impressions...
*Positive*
* The UI, starting from the same schematic entry
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CW
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#23718
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Spice Simulator plot window font (KiCad 7.0.5)
I'm trying out the SPICE/ngspice simulator in 7.0.5 (Release). The font size used on the axis labels is tiny - unreadable on a 3840 x 2160 display. Is there any way for the user to change it? I don't
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CW
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#23717
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Edited
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Re: Net-connection/highlighting issues for nets from different buses giving ERC errors
#erc
#debug
#bus
#connection_name
I think you'll find that nets can only have one name on a sheet. In a hierarchical design, connected wires can have different different names in different sheets, but when the netlist is flattened
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Tony Casey
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#23716
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Re: Net-connection/highlighting issues for nets from different buses giving ERC errors
#erc
#debug
#bus
#connection_name
I think you're basically assigning two different net names to a single net. either use a 0 Ohm jumper, a net tie or consider not using a bus on one side of the connection
PS: not a kicad pro ;-)
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fbaettermann
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#23715
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Net-connection/highlighting issues for nets from different buses giving ERC errors
#erc
#debug
#bus
#connection_name
Hi
I have made a schematic with multiple cascaded hierarchical sheets. For ease of navigation and convenience, I have used buses throughout the schematic to make wire connections and to bring out as
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laaboni@...
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#23714
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Re: Automatic disposition of thermal vias
Hi Robert,
thanks for your answer.
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No, I get what you mean, don't worry.
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That's exactly what I did: I created three arrays of 360 vias each on three circumferences of
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alessandro longo
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#23713
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Re: Automatic disposition of thermal vias
OK, I've had a look at this now, and I see two options.
Doing a one-off the most sensible option is to roll up your sleeves and
get on with it! Yes, you can use the array tools to get yourself
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Robert
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#23712
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