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Using Z80MC SIO RAM BANKS

 

Hello,
Is it possible to run a program from Z80 SIO RAM??
With SIO installed and RAM Bank 0 selected, I can type a short program starting #8000 (CPU RAM) then point PC to #8000 and execute with no problem.
When I type the same program in #0000 (SOI RAM Bank 0), point PC to #0000, execution crashes the system. Either I get a blank no responsive front panel or HARD 01 message.
Is this the normal behavior or indicates a hardware problem?
Thank you,
Kerem
 

Depends from CP/M, yes.
From basic in Eprom, no.
?
Keep in mind when you do ram banking your changing the active memory map
and stuff may disappear or end up in the wrong place.
?
The memory map is not at all explained.
?
Base machine (no SIO) rom is lower 32K and ram U2 is always upper 32K.?
At reset EProm U3 is the lower 32K.
?
Add SIO with standard AS6c1008 128k byte ram...
That ram exists as one of 4 banks of? in the lower 32K or as 32K eprom.
How they are selected is the Bank register U5, memory decoder U4,
and bits from the output of the 8250 register.
?
Picture included of what the memory map can be logically.
?
Allison

Z80-MC-W-SIO-MEMORY.jpg

 

Also read and understand ZMCv15 which is about the erom contect monitor and Basic.
?
How register are used is in there and also the memory mapping bits.? AS Z80 code
its loaded with good examples.? Its not trivial code!
?
That means reading Z80 code and understanding it.? ?Lee did a decent job of
organizing and commenting the code.? ITs in a Zip file in the files area.?
?
/g/Z80MC/files/AllisonKB1GMX/ZMCv15.zip
?
?
Allison
 

Thank you Allison for your explanation and patience.
I turn on the CPU Card+SIO+FP combination, wait for loading from SD with message FL 0030
Then F+E soft reset to stop PC from moving, I think it is executing CP/M
Click on "9" to set RAM bank to 0 "RAM 0"
Set PC to 0000
Set BC to 0000
Enter program (example from the manual) into 0000 (3C C2 00 80 03 C3 00 80)
Verify PC and BC are 0000
Then press 4 "go" to execute the program from RAM address 0000 SIO Bank 0
It crashes with HARD 01
Same steps when entered into 8000 works fine, I can see BC is counting up.
What am I doing wrong? Does this mean I cannot run a program from SIO RAM Bank?
Thank you,
Kerem
 

It means if you are using the monitor to load at 0000, you can't, rom is there.
also 0000 is the start address for the eprom so it will bark at you.
?
The rom has to be there to run and communicate with the buttons.? Its
why I suggested reading the V15 code to understand what the rom
does and the memory map it expects.
?
If you wanted to run code at 0000 for some reason then you need to
put a (new) monitor in high ram then enable the low ram bank. The
code in High ram allows you to talk to the machine rather than crash it.
?
The design is such that from 8000h and up is always ram.
?
FYI CP/M enables low ram and loads itself in high ram.? Once you get the
startup message you have 64K of ram with CP/M eating about 8k of the
high end of the ram.? It reserves 0-100H as system page and from 100 to?
end of the TPA as program space.? ?The TPS is Transient Program space
and something like 56K.? Asm, DDT, Stat, PIP, and a few other are tools
in the uSD.? That's my normal development environment.
?
?
Allison
 
Edited

>>Is it possible to run a program from Z80 SIO RAM? <<
?
The answer is yes.? But not the way you want to do it.
?
The keyboard and display is part of the issue and the other part
is that the rom that runs that is in that space.? The two are linked
and while ram is accessible your simple code depends on the rom
and the display to be available or it would not be visible.
?
That code?
8000? ? ? 3C? ? ? ? ? ? ? ? ? ?inc ? A
8001? ? ? C2 00 80 ? ? ?Jp ? ?NZ,8000? ? ?; jump to 8000 if A ne 0
8004? ? ? ?03? ? ? ? ? ? ? ? ? ?inc ? BC? ? ? ? ? ? ? ; Inc BC
8005? ? ? ?C3 00 80 ? ? ?JMP ? 8000? ? ? ? ; go to 8000
?
takes about 142 seconds to execute the double loop?
(roughly 570 million clock cycles).? the AC will overflow
to zero every 640us (approximately).
?
The problem is if you are seeing BC increment that means
you have the monitors interrupt stopping it to show the
state on the display and its capturing the register and
placing on the display.? So that simple code is running
several hundred bytes of the rom to do what you see.
?
?
Allison
 

Hi Allison,

I just got back home from a trip to VCF-East in New Jersey, and then a week visiting family in Michigan (over 3000 miles of driving -- yech). I'm still catching up on emails while I was gone. Josh Bensadon (who wrote the software for the Z80MC) was also at VCF-East, so I imagine he's busy catching up as well. I see there's been a lot of activity on the Z80MC list. Thanks to Allison for holding sway in our absence!

Josh's CP/M Explorer works on my computer with Win 7. That's the latest version of Windows I have. He wrote it back in 2019. Perhaps Microsoft has broken something in later versions? I think he wrote it in Visual BASIC. Maybe it needs to be re-compiled to work in later version of Windows.

Allison is right about the Z80MC memory map. With just the CPU card, or the CPU + Front Panel card. it has the EPROM at 0-32k, and the RAM at 32-64k. Very simple. Kerem can't load programs at 0-32k unless he writes them into the EPROM (there is still quite a bit of space in it).

With the Z80-SIO card, things get more complicated. The CPU card has series resistors between the address decoder and RAM and ROM chip-selects. These allow other cards (like the Z80-SIO) to alter the memory map. U4 on the Z80-SIO (75HCT151) is the memory decoder. It is controlled by output port C1h bit D0 (BANK).

At power-up, or reset, or if xxxx.xxx0 is written to port C1h, BANK=0. The SIO card has no effect on CPU card RAM or ROM.

If xxxx.xxx1 is written to port C1h, BANK=1. This changes the memory map as follows:

1. Writes with A15=0 (0-32k) write to the SIO card's current RAM bank.
2. Writes with A15=1 (32-64k) write to CPU card's RAM.
3. Reads with A15=0 (0-32k) disable the CPU ROM, and instead read the SIO card's current RAM bank.
4. Reads with A15=1 (32-64k) read CPU card's RAM.

The 128k RAM on the SIO card has 4 banks of 32k each. These are selected by writing to output port FCh (8250 MODEM control register 4). The extra address bits are as follows:

FCh bit 0 = /DTR = B15 \ selects bank in 128k or 512k RAM
FCh bit 1 = /RTS = B16 /
FCh bit 2 = /OUT1 = B17 \ selects bank in 512k RAM
FCh bit 3 = /OUT2 = B18 /
FCh bits 4-7 should be set to 0

Note that the physical pins are *inverted* (so you have to write a "0" to set the address pin high).

What does all this mean? CP/M expects an all-RAM system, with RAM from 0-64k. 0-100h needs to contain restart and interrupt vectors, jumps to the BDOS, input and DMA buffers, and other important constants. The high end of RAM needs to contain the CCP, BDOS, and BIOS. The C/PM "boot" program sets all this up for you. The source is on my website, and Josh did an excellent job of commenting it. User programs usually start at 0100h, so they have full access to all of C/PM's subroutines and features.

I hope this helps. If you find any errors or omissions, please let me know!

Lee
--
Excellence does not require perfection. -- Henry James
But it *does* require attention to detail! -- Lee Hart
--
Lee A. Hart

 

>>>Josh's CP/M Explorer works on my computer with Win 7. That's the latest version of Windows I have. He wrote it back in 2019. Perhaps Microsoft has broken something in later versions? I think he wrote it in Visual BASIC. Maybe it needs to be re-compiled to work in later version of Windows.<<<
?
NOTE: I'm not a winders user, I use Linux Ubuntu or Mint both derived off the Debian tree.
?
So to run windows code I use Wine (windows emulation) and generally V7 winders
programs are compatible with wine.
?
In this case its more like the code is one big no-op try to run it and linux says
not there, nobody's home.
?
So I'm stumped.
?
Allison
 
Edited

To be clear CP/M once running only used one of the possible 4 ram banks??
I ask as then I don't have to search trough the code to understand if it
does and how.?
?
Reason I ask Is I have a version of a Bios that is banked.? I've developed more
than a few BIOS for different systems most to improve the rather simplistic
support for IO.? That and allow for more disk starting with 5mb in 1980 and
growing from there. ? The result? of a banked BIOSis larger TPA as the BIOS
is less than 2K in high ram but the paged ram contains the rest of the bios
and especially the large buffers used for the allocation vectors.? ?The remaining
two pages (64K total) can be used for RAM disk or foreground/background
programs.? Foreground background is easy to do, periodic interrupt driven
code causes a simple tasker manager to see if a task is pending?and if so
executes it.? Only one task level for simplicity usually print spooler.
Its easily extended to more.? Since its an interrupt driven CP/M doesn't
directly see it as it steels cycles and returns.? If IO such as a circular input
buffer (to support type ahead)? exists and interrupt drive then its the
priority task in the list.
?
Nice system.
?
Most people don't really understand CP/M and really don't realize that?
it is very permissive in what can be done.??
?
?
Allison
 

VCF-East in New Jersey...
?
I wanted to but, it would have been 600 miles round trip and?
I'd not be able to stay over night.? Maybe next time.
?
Last time I was down there was about 1980 when it was
TCF Trenton Computer Fest.
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Hope it was good for you.
?
?
Allison

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